8( 6openpandora,omap3-pandora-600mhzti,omap3430ti,omap3 +7Pandora Handheld Consolechosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000!d/ocp@68000000/spi@48098000/lcd@1cpus+cpu@0arm,cortex-a8mcpuy}cpupmu@54000000arm,cortex-a8-pmuyTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busyh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busy + pinmux@30 ti,omap3-padconfpinctrl-singley08+&Dpinmux_mmc1_pins0apinmux_mmc2_pinsPa(*,.02468:pinmux_dss_dpi_pinsa^ pinmux_uart3_pinsanAppinmux_leds_pins a$&`bpinmux_button_pinsapinmux_penirq_pinsapinmux_twl4030_pinsaAscm_conf@270sysconsimple-busyp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapyupbias_mmc_omap2430|pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock}yh mcbsp5_fckti,composite-clock} mcbsp1_mux_fck@4ti,composite-mux-clock}y mcbsp1_fckti,composite-clock} mcbsp2_mux_fck@4ti,composite-mux-clock} ymcbsp2_fckti,composite-clock} mcbsp3_mux_fck@68ti,composite-mux-clock} yhmcbsp3_fckti,composite-clock}mcbsp4_mux_fck@68ti,composite-mux-clock} yhmcbsp4_fckti,composite-clock}clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singley \+&Dpinmux_twl4030_vpins atarget-module@480a6000ti,sysc-omap2ti,syscyH `DH `HH `Lrevsyscsyss }ick+ H ` aes1@0 ti,omap3-aesyP   txrxtarget-module@480c5000ti,sysc-omap2ti,syscyH PDH PHH PLrevsyscsyss }ick+ H P aes2@0 ti,omap3-aesyPAB txrxprm@48306000 ti,omap3-prmyH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock}y @sys_ck@1270ti,divider-clock}&yp1!sys_clkout1@d70ti,gate-clock}y pdpll3_x2_ckfixed-factor-clock}HSdpll3_m2x2_ckfixed-factor-clock}HS dpll4_x2_ckfixed-factor-clock}HScorex2_fckfixed-factor-clock} HS"wkup_l4_ickfixed-factor-clock}!HSQcorex2_d3_fckfixed-factor-clock}"HScorex2_d5_fckfixed-factor-clock}"HSclockdomainscm@48004000 ti,omap3-cmyH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockCvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-clock}!!y D 0dpll4_m2_ck@d48ti,divider-clock}&?y H1#dpll4_m2x2_mul_ckfixed-factor-clock}#HS$dpll4_m2x2_ck@d00ti,gate-clock}$y ]%omap_96m_alwon_fckfixed-factor-clock}%HS,dpll3_ck@d00ti,omap3-dpll-core-clock}!!y @ 0dpll3_m3_ck@1140ti,divider-clock}&y@1&dpll3_m3x2_mul_ckfixed-factor-clock}&HS'dpll3_m3x2_ck@d00ti,gate-clock}' y ](emu_core_alwon_ckfixed-factor-clock}(HSesys_altclk fixed-clock1mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock}&y @1core_ckfixed-factor-clock}HS)dpll1_fck@940ti,divider-clock})&y @1*dpll1_ck@904ti,omap3-dpll-clock}!*y  $ @ 4dpll1_x2_ckfixed-factor-clock}HS+dpll1_x2m2_ck@944ti,divider-clock}+&y D1?cm_96m_fckfixed-factor-clock},HS-omap_96m_fck@d40 ti,mux-clock}-!y @Hdpll4_m3_ck@e40ti,divider-clock}& y@1.dpll4_m3x2_mul_ckfixed-factor-clock}.HS/dpll4_m3x2_ck@d00ti,gate-clock}/y ]0omap_54m_fck@d40 ti,mux-clock}01y @;cm_96m_d2_fckfixed-factor-clock}-HS2omap_48m_fck@d40 ti,mux-clock}21y @3omap_12m_fckfixed-factor-clock}3HSJdpll4_m4_ck@e40ti,divider-clock}&y@14dpll4_m4x2_mul_ckti,fixed-factor-clock}4s5dpll4_m4x2_ck@d00ti,gate-clock}5y ]dpll4_m5_ck@f40ti,divider-clock}&?y@16dpll4_m5x2_mul_ckti,fixed-factor-clock}6s7dpll4_m5x2_ck@d00ti,gate-clock}7y ]mdpll4_m6_ck@1140ti,divider-clock}&?y@18dpll4_m6x2_mul_ckfixed-factor-clock}8HS9dpll4_m6x2_ck@d00ti,gate-clock}9y ]:emu_per_alwon_ckfixed-factor-clock}:HSfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock})y p<clkout2_src_mux_ck@d70ti,composite-mux-clock})!-;y p=clkout2_src_ckti,composite-clock}<=>sys_clkout2@d70ti,divider-clock}>&@y pmpu_ckfixed-factor-clock}?HS@arm_fck@924ti,divider-clock}@y $&emu_mpu_alwon_ckfixed-factor-clock}@HSgl3_ick@a40ti,divider-clock})&y @1Al4_ick@a40ti,divider-clock}A&y @1Brm_ick@c40ti,divider-clock}B&y @1gpt10_gate_fck@a00ti,composite-gate-clock}! y Dgpt10_mux_fck@a40ti,composite-mux-clock}C!y @Egpt10_fckti,composite-clock}DEgpt11_gate_fck@a00ti,composite-gate-clock}! y Fgpt11_mux_fck@a40ti,composite-mux-clock}C!y @Ggpt11_fckti,composite-clock}FGcore_96m_fckfixed-factor-clock}HHSmmchs2_fck@a00ti,wait-gate-clock}y mmchs1_fck@a00ti,wait-gate-clock}y i2c3_fck@a00ti,wait-gate-clock}y i2c2_fck@a00ti,wait-gate-clock}y i2c1_fck@a00ti,wait-gate-clock}y mcbsp5_gate_fck@a00ti,composite-gate-clock} y mcbsp1_gate_fck@a00ti,composite-gate-clock} y  core_48m_fckfixed-factor-clock}3HSImcspi4_fck@a00ti,wait-gate-clock}Iy mcspi3_fck@a00ti,wait-gate-clock}Iy mcspi2_fck@a00ti,wait-gate-clock}Iy mcspi1_fck@a00ti,wait-gate-clock}Iy uart2_fck@a00ti,wait-gate-clock}Iy uart1_fck@a00ti,wait-gate-clock}Iy  core_12m_fckfixed-factor-clock}JHSKhdq_fck@a00ti,wait-gate-clock}Ky core_l3_ickfixed-factor-clock}AHSLsdrc_ick@a10ti,wait-gate-clock}Ly gpmc_fckfixed-factor-clock}LHScore_l4_ickfixed-factor-clock}BHSMmmchs2_ick@a10ti,omap3-interface-clock}My mmchs1_ick@a10ti,omap3-interface-clock}My hdq_ick@a10ti,omap3-interface-clock}My mcspi4_ick@a10ti,omap3-interface-clock}My mcspi3_ick@a10ti,omap3-interface-clock}My mcspi2_ick@a10ti,omap3-interface-clock}My mcspi1_ick@a10ti,omap3-interface-clock}My i2c3_ick@a10ti,omap3-interface-clock}My i2c2_ick@a10ti,omap3-interface-clock}My i2c1_ick@a10ti,omap3-interface-clock}My uart2_ick@a10ti,omap3-interface-clock}My uart1_ick@a10ti,omap3-interface-clock}My  gpt11_ick@a10ti,omap3-interface-clock}My  gpt10_ick@a10ti,omap3-interface-clock}My  mcbsp5_ick@a10ti,omap3-interface-clock}My  mcbsp1_ick@a10ti,omap3-interface-clock}My  omapctrl_ick@a10ti,omap3-interface-clock}My dss_tv_fck@e00ti,gate-clock};ydss_96m_fck@e00ti,gate-clock}Hydss2_alwon_fck@e00ti,gate-clock}!ydummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock}!y Ngpt1_mux_fck@c40ti,composite-mux-clock}C!y @Ogpt1_fckti,composite-clock}NOaes2_ick@a10ti,omap3-interface-clock}My wkup_32k_fckfixed-factor-clock}CHSPgpio1_dbck@c00ti,gate-clock}Py sha12_ick@a10ti,omap3-interface-clock}My wdt2_fck@c00ti,wait-gate-clock}Py wdt2_ick@c10ti,omap3-interface-clock}Qy wdt1_ick@c10ti,omap3-interface-clock}Qy gpio1_ick@c10ti,omap3-interface-clock}Qy omap_32ksync_ick@c10ti,omap3-interface-clock}Qy gpt12_ick@c10ti,omap3-interface-clock}Qy gpt1_ick@c10ti,omap3-interface-clock}Qy per_96m_fckfixed-factor-clock},HS per_48m_fckfixed-factor-clock}3HSRuart3_fck@1000ti,wait-gate-clock}Ry gpt2_gate_fck@1000ti,composite-gate-clock}!ySgpt2_mux_fck@1040ti,composite-mux-clock}C!y@Tgpt2_fckti,composite-clock}STgpt3_gate_fck@1000ti,composite-gate-clock}!yUgpt3_mux_fck@1040ti,composite-mux-clock}C!y@Vgpt3_fckti,composite-clock}UVgpt4_gate_fck@1000ti,composite-gate-clock}!yWgpt4_mux_fck@1040ti,composite-mux-clock}C!y@Xgpt4_fckti,composite-clock}WXgpt5_gate_fck@1000ti,composite-gate-clock}!yYgpt5_mux_fck@1040ti,composite-mux-clock}C!y@Zgpt5_fckti,composite-clock}YZgpt6_gate_fck@1000ti,composite-gate-clock}!y[gpt6_mux_fck@1040ti,composite-mux-clock}C!y@\gpt6_fckti,composite-clock}[\gpt7_gate_fck@1000ti,composite-gate-clock}!y]gpt7_mux_fck@1040ti,composite-mux-clock}C!y@^gpt7_fckti,composite-clock}]^gpt8_gate_fck@1000ti,composite-gate-clock}! y_gpt8_mux_fck@1040ti,composite-mux-clock}C!y@`gpt8_fckti,composite-clock}_`gpt9_gate_fck@1000ti,composite-gate-clock}! yagpt9_mux_fck@1040ti,composite-mux-clock}C!y@bgpt9_fckti,composite-clock}abper_32k_alwon_fckfixed-factor-clock}CHScgpio6_dbck@1000ti,gate-clock}cygpio5_dbck@1000ti,gate-clock}cygpio4_dbck@1000ti,gate-clock}cygpio3_dbck@1000ti,gate-clock}cygpio2_dbck@1000ti,gate-clock}cy wdt3_fck@1000ti,wait-gate-clock}cy per_l4_ickfixed-factor-clock}BHSdgpio6_ick@1010ti,omap3-interface-clock}dygpio5_ick@1010ti,omap3-interface-clock}dygpio4_ick@1010ti,omap3-interface-clock}dygpio3_ick@1010ti,omap3-interface-clock}dygpio2_ick@1010ti,omap3-interface-clock}dy wdt3_ick@1010ti,omap3-interface-clock}dy uart3_ick@1010ti,omap3-interface-clock}dy uart4_ick@1010ti,omap3-interface-clock}dygpt9_ick@1010ti,omap3-interface-clock}dy gpt8_ick@1010ti,omap3-interface-clock}dy gpt7_ick@1010ti,omap3-interface-clock}dygpt6_ick@1010ti,omap3-interface-clock}dygpt5_ick@1010ti,omap3-interface-clock}dygpt4_ick@1010ti,omap3-interface-clock}dygpt3_ick@1010ti,omap3-interface-clock}dygpt2_ick@1010ti,omap3-interface-clock}dymcbsp2_ick@1010ti,omap3-interface-clock}dymcbsp3_ick@1010ti,omap3-interface-clock}dymcbsp4_ick@1010ti,omap3-interface-clock}dymcbsp2_gate_fck@1000ti,composite-gate-clock}y mcbsp3_gate_fck@1000ti,composite-gate-clock}ymcbsp4_gate_fck@1000ti,composite-gate-clock}yemu_src_mux_ck@1140 ti,mux-clock}!efgy@hemu_src_ckti,clkdm-gate-clock}hipclk_fck@1140ti,divider-clock}i&y@1pclkx2_fck@1140ti,divider-clock}i&y@1atclk_fck@1140ti,divider-clock}i&y@1traceclk_src_fck@1140 ti,mux-clock}!efgy@jtraceclk_fck@1140ti,divider-clock}j &y@1secure_32k_fck fixed-clockkgpt12_fckfixed-factor-clock}kHSwdt1_fckfixed-factor-clock}kHSsecurity_l4_ick2fixed-factor-clock}BHSlaes1_ick@a14ti,omap3-interface-clock}ly rng_ick@a14ti,omap3-interface-clock}ly sha11_ick@a14ti,omap3-interface-clock}ly des1_ick@a14ti,omap3-interface-clock}ly cam_mclk@f00ti,gate-clock}mycam_ick@f10!ti,omap3-no-wait-interface-clock}Bycsi2_96m_fck@f00ti,gate-clock}ysecurity_l3_ickfixed-factor-clock}AHSnpka_ick@a14ti,omap3-interface-clock}ny icr_ick@a10ti,omap3-interface-clock}My des2_ick@a10ti,omap3-interface-clock}My mspro_ick@a10ti,omap3-interface-clock}My mailboxes_ick@a10ti,omap3-interface-clock}My ssi_l4_ickfixed-factor-clock}BHSusr1_fck@c00ti,wait-gate-clock}!y sr2_fck@c00ti,wait-gate-clock}!y sr_l4_ickfixed-factor-clock}BHSdpll2_fck@40ti,divider-clock})&y@1odpll2_ck@4ti,omap3-dpll-clock}!oy$@4pdpll2_m2_ck@44ti,divider-clock}p&yD1qiva2_ck@0ti,wait-gate-clock}qymodem_fck@a00ti,omap3-interface-clock}!y sad2d_ick@a10ti,omap3-interface-clock}Ay mad2d_ick@a18ti,omap3-interface-clock}Ay mspro_fck@a00ti,wait-gate-clock}y ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock}"y rssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock}"y @$sssi_ssr_fck_3430es2ti,composite-clock}rstssi_sst_fck_3430es2fixed-factor-clock}tHShsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock}Ly ssi_ick_3430es2@a10ti,omap3-ssi-interface-clock}uy usim_gate_fck@c00ti,composite-gate-clock}H y sys_d2_ckfixed-factor-clock}!HSwomap_96m_d2_fckfixed-factor-clock}HHSxomap_96m_d4_fckfixed-factor-clock}HHSyomap_96m_d8_fckfixed-factor-clock}HHSzomap_96m_d10_fckfixed-factor-clock}HHS {dpll5_m2_d4_ckfixed-factor-clock}vHS|dpll5_m2_d8_ckfixed-factor-clock}vHS}dpll5_m2_d16_ckfixed-factor-clock}vHS~dpll5_m2_d20_ckfixed-factor-clock}vHSusim_mux_fck@c40ti,composite-mux-clock(}!wxyz{|}~y @1usim_fckti,composite-clock}usim_ick@c10ti,omap3-interface-clock}Qy  dpll5_ck@d04ti,omap3-dpll-clock}!!y  $ L 4dpll5_m2_ck@d50ti,divider-clock}&y P1vsgx_gate_fck@b00ti,composite-gate-clock})y core_d3_ckfixed-factor-clock})HScore_d4_ckfixed-factor-clock})HScore_d6_ckfixed-factor-clock})HSomap_192m_alwon_fckfixed-factor-clock}%HScore_d2_ckfixed-factor-clock})HSsgx_mux_fck@b40ti,composite-mux-clock }-y @sgx_fckti,composite-clock}sgx_ick@b10ti,wait-gate-clock}Ay cpefuse_fck@a08ti,gate-clock}!y ts_fck@a08ti,gate-clock}Cy usbtll_fck@a08ti,wait-gate-clock}vy usbtll_ick@a18ti,omap3-interface-clock}My mmchs3_ick@a10ti,omap3-interface-clock}My mmchs3_fck@a00ti,wait-gate-clock}y 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tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiyH 0+mcspi4FG tx0rx01w@480b2000 ti,omap3-1wyH :hdq1wmmc@4809c000ti,omap3-hsmmcyH Smmc1=> txrxfdefaultt mmc@480b4000ti,omap3-hsmmcyH @Vmmc2/0 txrxfdefaultt mmc@480ad000ti,omap3-hsmmcyH ^mmc3MN txrxfdefaultt+wifi@1 ti,wl1251y mmu@480bd400ti,omap2-iommuyH mmu_ispmmu@5d000000ti,omap2-iommuy]mmu_iva $disabledwdt@48314000 ti,omap3-wdtyH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspyH@mpu ;< +commontxrx;mcbsp1  txrx}fck $disabledtarget-module@480a0000ti,sysc-omap2ti,syscyH <H @H Drevsyscsyss}ick+ H rng@0 ti,omap2-rngy 4mcbsp@49022000ti,omap3-mcbspyI I mpusidetone>?+commontxrxsidetone;mcbsp2mcbsp2_sidetone!" txrx}fckick $disabledmcbsp@49024000ti,omap3-mcbspyI@I mpusidetoneYZ+commontxrxsidetone;mcbsp3mcbsp3_sidetone txrx}fckick $disabledmcbsp@49026000ti,omap3-mcbspyI`mpu 67 +commontxrx;mcbsp4 txrx}fckJ $disabledmcbsp@48096000ti,omap3-mcbspyH `mpu QR +commontxrx;mcbsp5 txrx}fck $disabledsham@480c3000ti,omap3-shamshamyH 0d1E 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/sw?P^,p,",(6@RR(0+x-loader@0exloaderybootloaders@80000eubootybootloaders_env@260000 euboot-envy&kernel@280000ebooty(filesystem@c80000erootfsyusb_otg_hs@480ab000ti,omap3-musbyH \]+mcdma usb_otg_hsBMU ^m uusb2-phy&2dss@48050000 ti,omap3-dssyH$okay dss_core}fck+fdefaultt  dispc@48050400ti,omap3-dispcyH dss_dispc}fckencoder@4804fc00 ti,omap3-dsiyHH@H protophypll $disabled dss_dsi1} fcksys_clk+encoder@48050800ti,omap3-rfbiyH $disabled dss_rfbi}fckickencoder@48050c00ti,omap3-vencyH $okay dss_venc}fck portendpointw portendpointw ssi-controller@48058000 ti,omap3-ssissi$okayyHHsysgddG+gdd_mpu+ }t ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portyHHtxrxCDssi-port@4805b000ti,omap3-ssi-portyHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleyH%$+&Dfdefaulttpinmux_hsusb2_2_pins0a   " pinmux_mmc3_pins0a  pinmux_control_pins0a isp@480bc000 ti,omap3-ispyH H |ulports+bandgap@48002524yH%$ti,omap34xx-bandgaptarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreyH $sysc}fck+ H smartreflex@0ti,omap3-smartreflex-coreytarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivayH $sysc}fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaytarget-module@50000000ti,sysc-omap2ti,syscyPrev}fckick+ P@opp-tableoperating-points-v2-ti-cpuuopp1-125000000sY@ opp2-250000000沀 g8g8g8 opp3-500000000e OOOopp4-550000000 U txtxtxopp5-600000000#F pppopp6-720000000*T ppp thermal-zonescpu_thermal  4 BN  Otripscpu_alert _8 ktpassivecpu_crit __ k tcriticalcooling-mapsmap0 v {memory@80000000mmemoryy oscillator fixed-clockconnectorconnector-analog-tvetvportendpointw gpio-leds gpio-ledsfdefaulttled1 epandora::sd1 q mmc0 offled2 epandora::sd2 q mmc1 offled3epandora::bluetooth q heartbeat offled4epandora::wifi q mmc2 offgpio-keys gpio-keysfdefaulttup-buttoneup g qEdown-buttonedown l qEleft-buttoneleft i qEright-buttoneright j qEpageup-buttonegame 1 h q Epagedown-buttonegame 3 m q Ehome-buttonegame 4 f qEend-buttonegame 2 k qEright-shiftel 6 qEkp-plusel2 N qEright-ctrler a q Ekp-minuser2 J q Eleft-ctrlectrl  qEmenuemenu  qEholdehold  qEleft-altealt 8 qElidelid   q hsusb2_phyusb-nop-xceiv k+fixed-regulator-usb_host_5vregulator-fixed |usb_host_5vLK@LK@   fixed-regulator-wg7210_enregulator-fixed|vwlanw@w@ P  fixed-regulator-wg7210_32kregulator-fixed |wg7210_32kw@w@    compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,use_poweroffti,ramp_delay_valuebci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencypendown-gpiovcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourcespi-cpolspi-cphalabelreset-gpiosremote-endpointti,dual-voltpbias-supplyvmmc-supplybus-widthcd-gpiosnon-removableti,non-removablecap-power-off-cardti,wl1251-has-eeprom#iommu-cellsti,#tlb-entriesstatusinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsnand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicelinux,default-triggerdefault-statelinux,codelinux,input-typeregulator-boot-onenable-active-highstartup-delay-us