A858( 5ouya,ouyanvidia,tegra30 +7Ouya Game Consoleemc-dvfs-opp-tableoperating-points-v2=opp@12750000,950 E~~pSŒZopp@12750000,1000 EB@B@pSŒZopp@12750000,1250 EpSŒZopp@25500000,950 E~~pS`Zopp@25500000,1000 EB@B@pS`Zopp@25500000,1250 EpS`Zopp@27000000,950 E~~pSZopp@27000000,1000 EB@B@pSZopp@27000000,1250 EpSZopp@51000000,950 E~~pS 2Zopp@51000000,1000 EB@B@pS 2Zopp@51000000,1250 EpS 2Zopp@54000000,950 E~~pS7Zopp@54000000,1000 EB@B@pS7Zopp@54000000,1250 EpS7Zopp@102000000,950 E~~pSeZopp@102000000,1000 EB@B@pSeZopp@102000000,1250 EpSeZopp@108000000,1000 EB@B@pSoZopp@108000000,1250 EpSoZopp@204000000,1000 EB@B@pS (Zkopp@204000000,1250 EpS (Zkopp@333500000,1000 EB@B@pS`Zopp@333500000,1200 EOOpS`Zopp@333500000,1250 EpS`Zopp@375000000,1000 EB@B@pSZ Zopp@375000000,1200 EOOpSZ Zopp@375000000,1250 EpSZ Zopp@400000000,1000 EB@B@pSׄZopp@400000000,1200 EOOpSׄZopp@400000000,1250 EpSׄZopp@416000000,1200 EOOpS˨Zopp@416000000,1250 EpS˨Zopp@450000000,1200 EOOpStZopp@450000000,1250 EpStZopp@533000000,1200 EOOpS@Zopp@533000000,1250 EpS@Zopp@625000000,1200 EOOpS%@@Zopp@625000000,1250 EpS%@@Zopp@667000000,1200 EOOpS'Zopp@750000000,1300 E  pS,Zopp@800000000,1300 E  pS/Zemc-bandwidth-opp-tableoperating-points-v2= opp@12750000SŒZwpopp@25500000S`Zwopp@27000000SZwKopp@51000000S 2Zw9opp@54000000S7Zwopp@102000000SeZw sopp@108000000SoZw /opp@204000000S (Zwkopp@333500000S`Zw(opp@375000000SZ Zw-opp@400000000SׄZw0opp@416000000S˨Zw2opp@450000000StZw6opp@533000000S@ZwA@opp@625000000S%@@ZwLK@opp@667000000S'ZwQkopp@750000000S,Zw[opp@800000000S/Zwamemory@80000000memory@pcie@3000nvidia,tegra30-pciepci08 padsaficsbc intrmsi b+@@ B(( FHpexafipll_ecmlFHJpexafipcie_x #disabledpci@1,0pci* #disabled+=pci@2,0pci* #disabled+=pci@3,0pci*@ #disabled+=sram@40000000 mmio-sram@+ @sram@400N= host1x@50000000nvidia,tegra30-host1xP@ACsyncpthost1xhost1xhost1xS + TTmpe@54040000nvidia,tegra30-mpeT D<<mpeSvi@54080000nvidia,tegra30-viT EviSepp@540c0000nvidia,tegra30-eppT  FeppSisp@54100000nvidia,tegra30-ispT GispSgr2d@54140000nvidia,tegra30-gr2dT H2dSgr3d@54180000nvidia,tegra30-gr3dTb3d3d2b3d3d2S  dc@54200000nvidia,tegra30-dcT  I dcparentdcSZ<f#twinawinbwinb-vfilterwinccursorrgb #disableddc@54240000nvidia,tegra30-dcT$ J dcparentdcSZ<f#twinawinbwinb-vfilterwinccursorrgb #disabledhdmi@54280000nvidia,tegra30-hdmiT( K3 hdmiparent3hdmi#okay   otvo@542c0000nvidia,tegra30-tvoT, L #disableddsi@54300000nvidia,tegra30-dsiT00 dsiparent0dsi #disableddsi@54400000nvidia,tegra30-dsiT@R dsiparentTdsi #disabledtimer@50040600arm,cortex-a9-twd-timerP    interrupt-controller@50041000arm,cortex-a9-gicPP =cache-controller@50043000arm,pl310-cacheP0  interrupt-controller@60004000nvidia,tegra30-ictlr(`@`AP`BP`CP`DP =timer@60005000*nvidia,tegra30-timernvidia,tegra20-timer`PH)*yzclock@60006000nvidia,tegra30-car``)=flow-controller@60007000nvidia,tegra30-flowctrl`pdma@6000a000,nvidia,tegra30-apbdmanvidia,tegra20-apbdma`hijklmnopqrstuvw""dma6=ahb@6000c000nvidia,tegra30-ahb`Pactmon@6000c800nvidia,tegra30-actmon` -w9 actmonemcwactmonA  f' tcpu-readgpio@6000d000nvidia,tegra30-gpio`` !"#7WY}Uaq )= vde@6001a000&nvidia,tegra30-vdenvidia,tegra20-vdeH`````````*sxebsevmbeppemcetfeppbvdmaframeid} $   sync-tokenbsevsxe=vdemc=Sapbmisc@70000800.nvidia,tegra30-apbmiscnvidia,tegra20-apbmiscpdppinmux@70000868nvidia,tegra30-pinmuxphp0default= pinmux=clk_32k_out_pa0clk_32k_out_pa0blinkuart3_cts_n_pa1uart3_cts_n_pa1uartcdap2_fs_pa2 dap2_fs_pa2i2s1dap2_sclk_pa3dap2_sclk_pa3i2s1dap2_din_pa4 dap2_din_pa4i2s1dap2_dout_pa5dap2_dout_pa5i2s1sdmmc3_clk_pa6sdmmc3_clk_pa6sdmmc3sdmmc3_cmd_pa7sdmmc3_cmd_pa7sdmmc3gmi_a17_pb0 gmi_a17_pb0spi4gmi_a18_pb1 gmi_a18_pb1spi4lcd_pwr0_pb2 lcd_pwr0_pb2 displayalcd_pclk_pb3 lcd_pclk_pb3 displayasdmmc3_dat3_pb4sdmmc3_dat3_pb4sdmmc3sdmmc3_dat2_pb5sdmmc3_dat2_pb5sdmmc3sdmmc3_dat1_pb6sdmmc3_dat1_pb6sdmmc3sdmmc3_dat0_pb7sdmmc3_dat0_pb7sdmmc3uart3_rts_n_pc0uart3_rts_n_pc0uartclcd_pwr1_pc1 lcd_pwr1_pc1 displayauart2_txd_pc2uart2_txd_pc2uartbuart2_rxd_pc3uart2_rxd_pc3uartbgen1_i2c_scl_pc4gen1_i2c_scl_pc4i2c1gen1_i2c_sda_pc5gen1_i2c_sda_pc5i2c1lcd_pwr2_pc6 lcd_pwr2_pc6 displayagmi_wp_n_pc7 gmi_wp_n_pc7gmisdmmc3_dat5_pd0sdmmc3_dat5_pd0sdmmc3sdmmc3_dat4_pd1sdmmc3_dat4_pd1sdmmc3lcd_dc1_pd2 lcd_dc1_pd2 displayasdmmc3_dat6_pd3sdmmc3_dat6_pd3spi4sdmmc3_dat7_pd4sdmmc3_dat7_pd4spi4vi_d1_pd5 vi_d1_pd5sdmmc2vi_vsync_pd6 vi_vsync_pd6ddrvi_hsync_pd7 vi_hsync_pd7ddrlcd_d0_pe0 lcd_d0_pe0 displayalcd_d1_pe1 lcd_d1_pe1 displayalcd_d2_pe2 lcd_d2_pe2 displayalcd_d3_pe3 lcd_d3_pe3 displayalcd_d4_pe4 lcd_d4_pe4 displayalcd_d5_pe5 lcd_d5_pe5 displayalcd_d6_pe6 lcd_d6_pe6 displayalcd_d7_pe7 lcd_d7_pe7 displayalcd_d8_pf0 lcd_d8_pf0 displayalcd_d9_pf1 lcd_d9_pf1 displayalcd_d10_pf2 lcd_d10_pf2 displayalcd_d11_pf3 lcd_d11_pf3 displayalcd_d12_pf4 lcd_d12_pf4 displayalcd_d13_pf5 lcd_d13_pf5 displayalcd_d14_pf6 lcd_d14_pf6 displayalcd_d15_pf7 lcd_d15_pf7 displayagmi_ad0_pg0 gmi_ad0_pg0nandgmi_ad1_pg1 gmi_ad1_pg1nandgmi_ad2_pg2 gmi_ad2_pg2nandgmi_ad3_pg3 gmi_ad3_pg3nandgmi_ad4_pg4 gmi_ad4_pg4nandgmi_ad5_pg5 gmi_ad5_pg5nandgmi_ad6_pg6 gmi_ad6_pg6nandgmi_ad7_pg7 gmi_ad7_pg7nandgmi_ad8_ph0 gmi_ad8_ph0pwm0gmi_ad9_ph1 gmi_ad9_ph1pwm1gmi_ad10_ph2 gmi_ad10_ph2pwm2gmi_ad11_ph3 gmi_ad11_ph3nandgmi_ad12_ph4 gmi_ad12_ph4nandgmi_ad13_ph5 gmi_ad13_ph5nandgmi_ad14_ph6 gmi_ad14_ph6nandgmi_wr_n_pi0 gmi_wr_n_pi0nandgmi_oe_n_pi1 gmi_oe_n_pi1nandgmi_dqs_pi2 gmi_dqs_pi2nandgmi_iordy_pi5gmi_iordy_pi5rsvd1gmi_cs7_n_pi6gmi_cs7_n_pi6nandgmi_wait_pi7 gmi_wait_pi7nandlcd_de_pj1 lcd_de_pj1 displayagmi_cs1_n_pj2gmi_cs1_n_pj2rsvd1lcd_hsync_pj3lcd_hsync_pj3 displayalcd_vsync_pj4lcd_vsync_pj4 displayauart2_cts_n_pj5uart2_cts_n_pj5uartbuart2_rts_n_pj6uart2_rts_n_pj6uartbgmi_a16_pj7 gmi_a16_pj7spi4gmi_adv_n_pk0gmi_adv_n_pk0nandgmi_clk_pk1 gmi_clk_pk1nandgmi_cs2_n_pk3gmi_cs2_n_pk3rsvd1gmi_cs3_n_pk4gmi_cs3_n_pk4nandspdif_out_pk5spdif_out_pk5spdifspdif_in_pk6 spdif_in_pk6spdifgmi_a19_pk7 gmi_a19_pk7spi4vi_d2_pl0 vi_d2_pl0sdmmc2vi_d3_pl1 vi_d3_pl1sdmmc2vi_d4_pl2 vi_d4_pl2vivi_d5_pl3 vi_d5_pl3sdmmc2vi_d6_pl4 vi_d6_pl4vivi_d7_pl5 vi_d7_pl5sdmmc2vi_d8_pl6 vi_d8_pl6sdmmc2vi_d9_pl7 vi_d9_pl7sdmmc2lcd_d16_pm0 lcd_d16_pm0 displayalcd_d17_pm1 lcd_d17_pm1 displayalcd_d18_pm2 lcd_d18_pm2 displayalcd_d19_pm3 lcd_d19_pm3 displayalcd_d20_pm4 lcd_d20_pm4 displayalcd_d21_pm5 lcd_d21_pm5 displayalcd_d22_pm6 lcd_d22_pm6 displayalcd_d23_pm7 lcd_d23_pm7 displayadap1_fs_pn0 dap1_fs_pn0i2s0dap1_din_pn1 dap1_din_pn1i2s0dap1_dout_pn2dap1_dout_pn2i2s0dap1_sclk_pn3dap1_sclk_pn3i2s0lcd_cs0_n_pn4lcd_cs0_n_pn4 displayalcd_sdout_pn5lcd_sdout_pn5 displayalcd_dc0_pn6 lcd_dc0_pn6 displayahdmi_int_pn7 hdmi_int_pn7hdmiulpi_data7_po0ulpi_data7_po0uartaulpi_data0_po1ulpi_data0_po1uartaulpi_data1_po2ulpi_data1_po2uartaulpi_data2_po3ulpi_data2_po3uartaulpi_data3_po4ulpi_data3_po4uartaulpi_data4_po5ulpi_data4_po5uartaulpi_data5_po6ulpi_data5_po6uartaulpi_data6_po7ulpi_data6_po7uartadap3_fs_pp0 dap3_fs_pp0i2s2dap3_din_pp1 dap3_din_pp1i2s2dap3_dout_pp2dap3_dout_pp2i2s2dap3_sclk_pp3dap3_sclk_pp3i2s2dap4_fs_pp4 dap4_fs_pp4i2s3dap4_din_pp5 dap4_din_pp5i2s3dap4_dout_pp6dap4_dout_pp6i2s3dap4_sclk_pp7dap4_sclk_pp7i2s3kb_col0_pq0 kb_col0_pq0kbckb_col1_pq1 kb_col1_pq1kbckb_col2_pq2 kb_col2_pq2kbckb_col3_pq3 kb_col3_pq3kbckb_col4_pq4 kb_col4_pq4kbckb_col5_pq5 kb_col5_pq5kbckb_col6_pq6 kb_col6_pq6kbckb_col7_pq7 kb_col7_pq7kbckb_row0_pr0 kb_row0_pr0kbckb_row1_pr1 kb_row1_pr1kbckb_row2_pr2 kb_row2_pr2kbckb_row3_pr3 kb_row3_pr3kbckb_row4_pr4 kb_row4_pr4kbckb_row5_pr5 kb_row5_pr5kbckb_row6_pr6 kb_row6_pr6kbckb_row7_pr7 kb_row7_pr7kbckb_row8_ps0 kb_row8_ps0kbckb_row9_ps1 kb_row9_ps1kbckb_row10_ps2 kb_row10_ps2kbckb_row11_ps3 kb_row11_ps3kbckb_row12_ps4 kb_row12_ps4kbckb_row13_ps5 kb_row13_ps5kbckb_row14_ps6 kb_row14_ps6kbckb_row15_ps7 kb_row15_ps7kbcvi_pclk_pt0 vi_pclk_pt0rsvd1vi_mclk_pt1 vi_mclk_pt1vivi_d10_pt2 vi_d10_pt2ddrvi_d11_pt3 vi_d11_pt3ddrvi_d0_pt4 vi_d0_pt4ddrgen2_i2c_scl_pt5gen2_i2c_scl_pt5i2c2gen2_i2c_sda_pt6gen2_i2c_sda_pt6i2c2sdmmc4_cmd_pt7sdmmc4_cmd_pt7sdmmc4pu0pu0owrpu1pu1rsvd1pu2pu2rsvd1pu3pu3pwm0pu4pu4pwm1pu5pu5rsvd4pu6pu6pwm3jtag_rtck_pu7jtag_rtck_pu7rtckpv0pv0rsvd1pv1pv1rsvd1pv2pv2owrpv3pv3 clk_12m_outddc_scl_pv4 ddc_scl_pv4i2c4ddc_sda_pv5 ddc_sda_pv5i2c4crt_hsync_pv6crt_hsync_pv6crtcrt_vsync_pv7crt_vsync_pv7crtlcd_cs1_n_pw0lcd_cs1_n_pw0 displayalcd_m1_pw1 lcd_m1_pw1 displayaspi2_cs1_n_pw2spi2_cs1_n_pw2spi2clk1_out_pw4 clk1_out_pw4 extperiph1clk2_out_pw5 clk2_out_pw5 extperiph2uart3_txd_pw6uart3_txd_pw6uartcuart3_rxd_pw7uart3_rxd_pw7uartcspi2_sck_px2 spi2_sck_px2gmispi1_mosi_px4spi1_mosi_px4spi1spi1_sck_px5 spi1_sck_px5spi1spi1_cs0_n_px6spi1_cs0_n_px6spi1spi1_miso_px7spi1_miso_px7spi1ulpi_clk_py0 ulpi_clk_py0uartdulpi_dir_py1 ulpi_dir_py1uartdulpi_nxt_py2 ulpi_nxt_py2uartdulpi_stp_py3 ulpi_stp_py3uartdsdmmc1_dat3_py4sdmmc1_dat3_py4sdmmc1sdmmc1_dat2_py5sdmmc1_dat2_py5sdmmc1sdmmc1_dat1_py6sdmmc1_dat1_py6sdmmc1sdmmc1_dat0_py7sdmmc1_dat0_py7sdmmc1sdmmc1_clk_pz0sdmmc1_clk_pz0sdmmc1sdmmc1_cmd_pz1sdmmc1_cmd_pz1sdmmc1lcd_sdin_pz2 lcd_sdin_pz2 displayalcd_wr_n_pz3 lcd_wr_n_pz3 displayalcd_sck_pz4 lcd_sck_pz4 displayasys_clk_req_pz5sys_clk_req_pz5sysclkpwr_i2c_scl_pz6pwr_i2c_scl_pz6i2cpwrpwr_i2c_sda_pz7pwr_i2c_sda_pz7i2cpwrsdmmc4_dat0_paa0sdmmc4_dat0_paa0sdmmc4sdmmc4_dat1_paa1sdmmc4_dat1_paa1sdmmc4sdmmc4_dat2_paa2sdmmc4_dat2_paa2sdmmc4sdmmc4_dat3_paa3sdmmc4_dat3_paa3sdmmc4sdmmc4_dat4_paa4sdmmc4_dat4_paa4sdmmc4sdmmc4_dat5_paa5sdmmc4_dat5_paa5sdmmc4sdmmc4_dat6_paa6sdmmc4_dat6_paa6sdmmc4sdmmc4_dat7_paa7sdmmc4_dat7_paa7sdmmc4pbb0pbb0i2s4cam_i2c_scl_pbb1cam_i2c_scl_pbb1i2c3cam_i2c_sda_pbb2cam_i2c_sda_pbb2i2c3pbb3pbb3vgp3pbb4pbb4vgp4pbb5pbb5vgp5pbb6pbb6vgp6pbb7pbb7i2s4cam_mclk_pcc0cam_mclk_pcc0vi_alt3pcc1pcc1i2s4pcc2pcc2i2s4sdmmc4_rst_n_pcc3sdmmc4_rst_n_pcc3sdmmc4sdmmc4_clk_pcc4sdmmc4_clk_pcc4sdmmc4clk2_req_pcc5clk2_req_pcc5dappex_l2_rst_n_pcc6pex_l2_rst_n_pcc6pciepex_l2_clkreq_n_pcc7pex_l2_clkreq_n_pcc7pciepex_l0_prsnt_n_pdd0pex_l0_prsnt_n_pdd0pciepex_l0_rst_n_pdd1pex_l0_rst_n_pdd1pciepex_l0_clkreq_n_pdd2pex_l0_clkreq_n_pdd2pciepex_wake_n_pdd3pex_wake_n_pdd3pciepex_l1_prsnt_n_pdd4pex_l1_prsnt_n_pdd4pciepex_l1_rst_n_pdd5pex_l1_rst_n_pdd5pciepex_l1_clkreq_n_pdd6pex_l1_clkreq_n_pdd6pciepex_l2_prsnt_n_pdd7pex_l2_prsnt_n_pdd7pcieclk3_out_pee0clk3_out_pee0 extperiph3clk3_req_pee1clk3_req_pee1dev3clk1_req_pee2clk1_req_pee2daphdmi_cec_pee3hdmi_cec_pee3cecowrowrowrdrive_groups(drive_gmadrive_gmbdrive_gmcdrive_gmd " :Rserial@70006000(nvidia,tegra30-uartnvidia,tegra20-uartp`@k $serialuzrxtx #disabledserial@70006040(nvidia,tegra30-uartnvidia,tegra20-uartp`@@k %serialu  zrxtx #disabledserial@70006200nvidia,tegra30-hsuartpbk .77serialu  zrxtx#okay$%d%B@= bluetoothbrcm,bcm4330-bt= txco      serial@70006300(nvidia,tegra30-uartnvidia,tegra20-uartpck ZAAserialuzrxtx#okayserial@70006400(nvidia,tegra30-uartnvidia,tegra20-uartpdk [BBserialuzrxtx #disabledgmi@70009000nvidia,tegra30-gmip+H*gmi*gmi #disabledpwm@7000a000&nvidia,tegra30-pwmnvidia,tegra20-pwmppwm #disabledrtc@7000e000&nvidia,tegra30-rtcnvidia,tegra20-rtcp i2c@7000c000&nvidia,tegra30-i2cnvidia,tegra20-i2cp &+ div-clkfast-clk i2cuzrxtx #disabledi2c@7000c400&nvidia,tegra30-i2cnvidia,tegra20-i2cp T+6div-clkfast-clk6i2cuzrxtx #disabledi2c@7000c500&nvidia,tegra30-i2cnvidia,tegra20-i2cp \+Cdiv-clkfast-clkCi2cuzrxtx #disabledi2c@7000c700&nvidia,tegra30-i2cnvidia,tegra20-i2cp x+ggi2cdiv-clkfast-clkuzrxtx#okay= i2c@7000d000&nvidia,tegra30-i2cnvidia,tegra20-i2cp 5+/div-clkfast-clk/i2cuzrxtx#okaynct1008@4c onnn,nct1008L=$pmic@2d ti,tps65911- V1$?PkUa=(regulatorsvdd1vddio_ddr_1v2OO/vdd2 vdd_1v5_gen``/=vddctrlvdd_cpu,vdd_sys 5`CZw/=vio vdd_1v8_genw@w@/=ldo1vdd_pexa,vdd_pexb/ldo2vdd_sata,avdd_plle/ldo4vdd_rtcOO/ldo5vddio_sdmmc,avdd_vdacw@2Z/ldo6avdd_dsi_csi,pwrdet_mipiOO/ldo7vdd_pllm,x,u,a_p_c_sOO/=ldo8 vdd_ddr_hsB@B@/tps62361@60 ti,tps62361` vdd_core~pCZw/=spi@7000d400*nvidia,tegra30-slinknvidia,tegra20-slinkp ;+))spiuzrxtx #disabledspi@7000d600*nvidia,tegra30-slinknvidia,tegra20-slinkp R+,,spiuzrxtx #disabledspi@7000d800*nvidia,tegra30-slinknvidia,tegra20-slinkp S+..spiuzrxtx #disabledspi@7000da00*nvidia,tegra30-slinknvidia,tegra20-slinkp ]+DDspiuzrxtx #disabledspi@7000dc00*nvidia,tegra30-slinknvidia,tegra20-slinkp ^+hhspiuzrxtx #disabledspi@7000de00*nvidia,tegra30-slinknvidia,tegra20-slinkp O+ijspiuzrxtx #disabledkbc@7000e200&nvidia,tegra30-kbcnvidia,tegra20-kbcp U$$kbc #disabledpmc@7000e400nvidia,tegra30-pmcp pclkclk32k_in#okay6Jc{=memory-controller@7000f000nvidia,tegra30-mcp mc M)=emc-timings-0timing-25500000`H" utiming-51000000 2H" tctiming-102000000eH" stiming-204000000 (H"% s timing-400000000ׄH" H   p timing-800000000/H"   q,$emc-timings-1timing-25500000`H" utiming-51000000 2H" tctiming-102000000eH" stiming-204000000 (H"% s timing-400000000ׄH" H   p timing-800000000/H"   q,$emc-timings-2timing-25500000`H" utiming-51000000 2H" ttiming-102000000eH" tCtiming-204000000 (H"% t timing-400000000ׄH" H   p timing-800000000/H"   q,$memory-controller@7000f400nvidia,tegra30-emcp N9<A=emc-timings-0timing-25500000`Ur !@d   0Bx!wtTh@ timing-51000000 2Ur !@d    `Bx!wtTh@  timing-102000000eUr !@d   Bx!wtTh@ timing-204000000 (Ur !@d 5   88 8BD!wtTh "timing-400000000ׄUr !@df   l 0p=wtT!X timing-800000000/Ur  q@d%      ` P  =""wtT! 0Iemc-timings-1timing-25500000`Ur !@d   0Bx!wtTh@ timing-51000000 2Ur !@d    `Bx!wtTh@  timing-102000000eUr !@d   Bx!wtTh@ timing-204000000 (Ur !@d 5   88 8BD!wtTh "timing-400000000ׄUr !@df   l 0p=wtT!X timing-800000000/Ur  q@d%      ` P  =""wtT! 0Iemc-timings-2timing-25500000`Ur !@d   0Bx!wtTh@ timing-51000000 2Ur !@d   `Bx!wtTh@  timing-102000000eUr !@d    Bx!wtTh@ timing-204000000 (Ur !@d =   @@ 8BD!wtTh "timing-400000000ׄUr !@dv   | 0p@@@@@@@@=wtT!H timing-800000000/Ur  q@d%      ` P    =""wtT ! 0Ifuse@7000f800nvidia,tegra30-efusepfuse'fusehda@70030000nvidia,tegra30-hdap Q}ohdahda2hdmihda2codec_2x}ohdahda2hdmihda2codec_2x#okayahub@70080000nvidia,tegra30-ahubpp gjkd_audioapbifXjk eflmn <d_audioapbifi2s0i2s1i2s2i2s3i2s4dam0dam1dam2spdif@u zrx0tx0rx1tx1rx2tx2rx3tx3+i2s@70080300nvidia,tegra30-i2spi2s #disabledi2s@70080400nvidia,tegra30-i2sp  i2s #disabledi2s@70080500nvidia,tegra30-i2spi2s #disabledi2s@70080600nvidia,tegra30-i2speei2s #disabledi2s@70080700nvidia,tegra30-i2spffi2s #disabledmmc@78000000nvidia,tegra30-sdhcix sdhcisdhci #disabledmmc@78000200nvidia,tegra30-sdhcix  sdhci sdhci #disabledmmc@78000400nvidia,tegra30-sdhcix EsdhciEsdhci#okay++E;Rguwifi@1brcm,bcm4329-fmac t host-wakemmc@78000600nvidia,tegra30-sdhcix sdhcisdhci#okayug`usb@7d000000nvidia,tegra30-udc}@ utmiusb#okayusb-phy@7d000000nvidia,tegra30-usb-phy}@}@utmiregpll_uutmi-padsusbutmi-pads    - D Y o3       #okay #peripheral=usb@7d004000nvidia,tegra30-ehciusb-ehci}@@ utmi::usb#okay+smsc@2 usb424,9e00 +"3DUusb-phy@7d004000nvidia,tegra30-usb-phy}@@}@utmi:regpll_uutmi-pads:usbutmi-pads    - D Y o3      #okay ==usb@7d008000nvidia,tegra30-ehciusb-ehci}@ autmi;;usb#okayusb-phy@7d008000nvidia,tegra30-usb-phy}@}@utmi;regpll_uutmi-pads;usbutmi-pads   - D Y o3      #okay ==cpus+cpu@0cpuarm,cortex-a9A I T= cpu@1cpuarm,cortex-a9A I T=!cpu@2cpuarm,cortex-a9A I T="cpu@3cpuarm,cortex-a9A I T=#pmuarm,cortex-a9-pmu0 c !"#cpu_opp_table0operating-points-v2 v=opp@51000000,800 Z1S 2 E 5 5opp@51000000,850 Z S 2 E P Popp@51000000,912 ZS 2 E opp@102000000,800 Z1Se E 5 5opp@102000000,850 Z Se E P Popp@102000000,912 ZSe E opp@204000000,800 Z1S (k E 5 5opp@204000000,850 Z S (k E P Popp@204000000,912 ZS (k E opp@312000000,850 Z S E P Popp@312000000,912 ZS E opp@340000000,800 ZSC E 5 5opp@340000000,850 ZSC E P Popp@370000000,800 Z0lS  E 5 5opp@456000000,850 Z S. E P Popp@456000000,912 ZS. E opp@475000000,800 Z1SO E 5 5opp@475000000,850 (ZSO E P Popp@608000000,850 ZS$=X E P Popp@608000000,912 ZS$=X E opp@620000000,850 Z0lS$s E P Popp@640000000,850 xZS&% E P Popp@640000000,900 ZS&% E opp@760000000,850 PZ4aS-L E P Popp@760000000,900 hZS-L E opp@760000000,912 ZS-L E opp@760000000,975 ZS-L Eopp@816000000,850 ZS0, E P Popp@816000000,912 ZS0, E opp@860000000,850 Z S3B E P Popp@860000000,900 xZS3B E opp@860000000,975 8ZS3B Eopp@860000000,1000 ZS3B EB@B@opp@910000000,900 Z0`S6= E opp@1000000000,900 Z S; E opp@1000000000,975 xZS; Eopp@1000000000,1000 ZS; EB@B@opp@1000000000,1025 ZS; Eopp@1100000000,900 ZSA E opp@1100000000,975 HZSA Eopp@1100000000,1000 8ZSA EB@B@opp@1100000000,1025 ZSA Eopp@1100000000,1075 ZSA Eg8g8opp@1150000000,975 Z0`SD Eopp@1200000000,975 ZSG Eopp@1200000000,1000 HZSG EB@B@opp@1200000000,1025 8ZSG Eopp@1200000000,1050 ZSG Eopp@1200000000,1075 ZSG Eg8g8opp@1200000000,1100 ZSG Eopp@1300000000,1000 ZSM|m EB@B@opp@1300000000,1025  ZSM|m Eopp@1300000000,1050 XZ0a @ SM|m Eopp@1300000000,1075  ZSM|m Eg8g8opp@1300000000,1100 ZSM|m Eopp@1300000000,1125 ZSM|m E**opp@1300000000,1150 ZSM|m E00opp@1300000000,1175 ZSM|m Eopp@1400000000,1100 Z0|SSrN Eopp@1400000000,1125 Z SSrN E**opp@1400000000,1150 Z SSrN E00opp@1400000000,1175 ZSSrN Eopp@1400000000,1237 ZSSrN Eopp@1500000000,1125 (Z @ SYh/ E**opp@1500000000,1150 (Z @ SYh/ E00opp@1500000000,1200 ZSYh/ EOOopp@1500000000,1237 ZSYh/ Eopp@1600000000,1212 Z0`S_^ E~`~`opp@1600000000,1237 Z0`S_^ Eopp@1700000000,1212 Z0`SeS E~`~`opp@1700000000,1237 Z0`SeS Ealiases /mmc@78000600 /mmc@78000400 /i2c@7000d000/pmic@2d /rtc@7000e000 /serial@70006300 /serial@70006200chosen serial0:115200n8reserved-memory+linux,cma@80000000shared-dma-pool €0   ramoops@bfdf0000ramoops   trustzone@bfe00000  wifi_pwrseqmmc-pwrseq-simple ext_clock   $, ;,=clock fixed-clock Npmic-oscillator=firmwaretrusted-foundationstlm,trusted-foundations a sgpio_fan gpio-fan  J  T=&thermal-zonescpu-thermal   $tripscpu-alert0 P 'active=%cpu-alert1 p passive='cpu-crit _  criticalcooling-mapsmap0 % &map1 '0 !"#vdd_12v_inregulator-fixed vdd_12v_in/=)sdmmc_3v3_regregulator-fixed sdmmc_3v32Z2Z /   =vdd_fuse_3v3_regregulator-fixed vdd_fuse_3v32Z2Z   ^ /vdd_vid_regregulator-fixed vddio_vidLK@LK@    =ddr_regregulator-fixedvdd_ddr``/  ( )sys_3v3_regregulator-fixedsys_3v32Z2Z  (/ )=vdd_5v0_regregulator-fixedvdd_5v0LK@LK@  (/ )=vdd_smscregulator-fixed vdd_smsc   =usb3_vbus_regregulator-fixed usb3_vbusLK@LK@    =gpio-keys gpio-keyspower     't 21leds gpio-ledsled-power Fpower-led  : Lon Zheartbeat p compatibleinterrupt-parent#address-cells#size-cellsmodelphandleopp-microvoltopp-hzopp-supported-hwopp-suspendopp-peak-kBpsdevice_typeregreg-namesinterruptsinterrupt-names#interrupt-cellsinterrupt-map-maskinterrupt-mapbus-rangerangesclocksclock-namesresetsreset-namesstatusassigned-addressesnvidia,num-lanespooliommusnvidia,headinterconnectsinterconnect-namesvdd-supplypll-supplyhdmi-supplynvidia,ddc-i2c-busnvidia,hpd-gpiointerrupt-controllerarm,data-latencyarm,tag-latencycache-unifiedcache-level#clock-cells#reset-cells#dma-cellsoperating-points-v2#gpio-cellsgpio-controllergpio-rangesirampinctrl-namespinctrl-0nvidia,pinsnvidia,functionnvidia,pullnvidia,tristatenvidia,enable-inputnvidia,open-drainnvidia,io-resetnvidia,pull-down-strengthnvidia,pull-up-strengthnvidia,slew-rate-risingnvidia,slew-rate-fallingreg-shiftdmasdma-namesnvidia,adjust-baud-ratesmax-speedvbat-supplyvddio-supplyshutdown-gpiosdevice-wakeup-gpioshost-wakeup-gpios#pwm-cellsclock-frequencyvcc-supply#thermal-sensor-cellswakeup-sourceti,en-gpio-sleepti,system-power-controllerti,sleep-keep-ck32kti,sleep-enablevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-coupled-withregulator-coupled-max-spreadregulator-max-step-microvoltnvidia,tegra-cpu-regulatorregulator-boot-onti,vsel0-state-highti,vsel1-state-highti,enable-vout-dischargenvidia,tegra-core-regulatornvidia,invert-interruptnvidia,suspend-modenvidia,cpu-pwr-good-timenvidia,cpu-pwr-off-timenvidia,core-pwr-good-timenvidia,core-pwr-off-timenvidia,core-power-req-active-highnvidia,sys-clock-req-active-high#iommu-cells#interconnect-cellsnvidia,ram-codenvidia,emem-configurationnvidia,memory-controllernvidia,emc-auto-cal-intervalnvidia,emc-mode-1nvidia,emc-mode-2nvidia,emc-mode-resetnvidia,emc-zcal-cnt-longnvidia,emc-cfg-periodic-qrstnvidia,emc-cfg-dyn-self-refnvidia,emc-configurationnvidia,ahub-cif-idsassigned-clocksassigned-clock-parentsassigned-clock-ratesmax-frequencykeep-power-in-suspendbus-widthnon-removablemmc-pwrseqvmmc-supplyvqmmc-supplynvidia,default-tapphy_typenvidia,needs-double-resetnvidia,phy#phy-cellsnvidia,hssync-start-delaynvidia,idle-wait-delaynvidia,elastic-limitnvidia,term-range-adjnvidia,xcvr-setupnvidia,xcvr-setup-use-fusesnvidia,xcvr-lsfslewnvidia,xcvr-lsrslewnvidia,xcvr-hsslewnvidia,hssquelch-levelnvidia,hsdiscon-levelnvidia,has-utmi-pad-registersdr_modelocal-mac-addressvbus-supplycpu-supply#cooling-cellsinterrupt-affinityopp-sharedclock-latency-nsmmc0mmc1rtc0rtc1serial0serial1stdout-pathalloc-rangessizelinux,cma-defaultreusableconsole-sizerecord-sizeecc-sizeno-mapreset-gpiospost-power-on-delay-mspower-off-delay-usclock-output-namestlm,version-majortlm,version-minorgpio-fan,speed-mappolling-delaypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-deviceenable-active-highvin-supplydebounce-intervallinux,codewakeup-event-actionlabeldefault-statelinux,default-triggerretain-state-suspended