Ð þíK08D°(€Dx elgin,rv1108-r1rockchip,rv1108&7Elgin RV1108 R1 boardaliases=/i2c@20000000B/i2c@10240000G/i2c@10250000L/i2c@10260000Q/serial@10230000Y/serial@10220000a/serial@10210000i/mmc@30110000cpuscpu@f00ncpuarm,cortex-a7z~œ@Œ“¢K¼ÐÛopp_tableoperating-points-v2Ûopp-408000000ãQ–êà˜øœ@opp-600000000ã#ÃFêà˜øœ@opp-816000000ã0£,ê£èøœ@opp-1008000000ã<ÜêŒ0øœ@arm-pmuarm,cortex-a7-pmu  Ltimerarm,armv7-timer  8n6oscillator fixed-clock8n6Hxin24m[Ûbus simple-bushpdma@102a0000arm,pl330arm,primecellz*@  oz•ŒÀ ¬apb_pclkÛsram@10080000 mmio-sramz  h serial@10210000&rockchip,rv1108-uartsnps,dw-apb-uartz!  .¸Â8n6ŒJ ¬baudclkapb_pclkÏÔdefaultâìokayserial@10220000&rockchip,rv1108-uartsnps,dw-apb-uartz"  -¸Â8n6ŒI ¬baudclkapb_pclkÏÔdefaultâ ìdisabledserial@10230000&rockchip,rv1108-uartsnps,dw-apb-uartz#  ,¸Â8n6ŒH ¬baudclkapb_pclkÏÔdefaultâìokayi2c@10240000rockchip,rv1108-i2cz$  Œv ¬i2cpclkÔdefaultâ ó  ìdisabledi2c@10250000rockchip,rv1108-i2cz%  Œw ¬i2cpclkÔdefaultâ ó  ìdisabledi2c@10260000rockchip,rv1108-i2cz&  !Œx ¬i2cpclkÔdefaultâ ó  ìdisabledspi@10270000rockchip,rv1108-spiz'  %Œl¬spiclkapb_pclkÏ txrxìokayÔdefaultâ dac@0rohm,dh2228fvz n6%pwm@10280000(rockchip,rv1108-pwmrockchip,rk3288-pwmz(  &Œy  ¬pwmpclkÔdefaultâ. ìdisabledpwm@10280010(rockchip,rv1108-pwmrockchip,rk3288-pwmz(  &Œy  ¬pwmpclkÔdefaultâ. ìdisabledpwm@10280020(rockchip,rv1108-pwmrockchip,rk3288-pwmz(   &Œy  ¬pwmpclkÔdefaultâ. ìdisabledpwm@10280030(rockchip,rv1108-pwmrockchip,rk3288-pwmz(0  &Œy  ¬pwmpclkÔdefaultâ. ìdisabledsyscon@10300000&rockchip,rv1108-grfsysconsimple-mfdz0Û usb2-phy@100rockchip,rv1108-usb2phyz Œ{¬phyclk[Husbphy9ìokayÛ+otg-port  0Iotg-muxYìokayÛ-host-port  3 IlinestateYìokayÛ,timer@10350000,rockchip,rv1108-timerrockchip,rk3288-timerz5   # Œ ¬timerpclkwatchdog@10360000 rockchip,rv1108-wdtsnps,dw-wdtz6  "Œ ìdisabledthermal-zonessoc-thermaldzèˆ2štripstrip-point0ªp¶Ðupassivetrip-point1ªL¶ÐupassiveÛsoc-critªs¶Ð ucriticalcooling-mapsmap0Á ÆÿÿÿÿÿÿÿÿÕtsadc@10370000rockchip,rv1108-tsadcz7  /ânò q°Œn ¬tsadcapb_pclkÔinitdefaultsleepâH "tsadc-apb.ÔÀE ìdisabledÛadc@1038c000.rockchip,rv1108-saradcrockchip,rk3399-saradcz8À  [Œm¬saradcapb_pclk ìdisabledi2c@20000000rockchip,rv1108-i2cz   Œ[ ¬i2cpclkÔdefaultâó ìokay8€m„pmic@18rockchip,rk805z& œ½ÉÕáíùregulatorsDCDC_REG1 vdd_core ®`,ã`DXÛregulator-state-memj‚ » DCDC_REG2 vdd_buck2!‘À,!‘ÀDXÛregulator-state-memžDCDC_REG3vcc_ddrDXregulator-state-memjDCDC_REG4vcc_io2Z ,2Z DXregulator-state-memj‚2Z LDO_REG1vdd_10B@,B@DXregulator-state-memžLDO_REG2vcc_18w@,w@DXregulator-state-memžLDO_REG3 vdd10_pmuB@,B@DXregulator-state-memj‚B@pwm@20040000(rockchip,rv1108-pwmrockchip,rk3288-pwmz   'ŒZ ¬pwmpclkÔdefaultâ . ìdisabledpwm@20040010(rockchip,rv1108-pwmrockchip,rk3288-pwmz   'ŒZ ¬pwmpclkÔdefaultâ!. ìdisabledpwm@20040020(rockchip,rv1108-pwmrockchip,rk3288-pwmz    'ŒZ ¬pwmpclkÔdefaultâ". ìdisabledpwm@20040030(rockchip,rv1108-pwmrockchip,rk3288-pwmz 0  'ŒZ ¬pwmpclkÔdefaultâ#. ìdisabledsyscon@20060000rockchip,rv1108-pmugrfsysconz Û0syscon@202a0000rockchip,rv1108-usbgrfsysconz *Ûclock-controller@20200000rockchip,rv1108-cruz ó [·Ûnand-controller@30100000rockchip,rv1108-nfcz0  ŒCC¬ahbnfcâCòðÑ€ ìdisabledmmc@301100000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒFGSV¬biuciuciu-driveciu-sampleÄðÑ€ìokayÏÙëñùÔdefault â$%&mmc@301200000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒEERU¬biuciuciu-driveciu-sampleÄðÑ€ ìdisabledmmc@301300000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   ŒDDQT¬biuciuciu-driveciu-sampleÄõáÔdefaultâ'()* ìdisabledusb@30140000 generic-ehciz0   ŒS+#,(usbìokayusb@30160000 generic-ohciz0   ŒS+#,(usbìokayusb@301800002rockchip,rv1108-usbrockchip,rk3066-usbsnps,dwc2z0  ŒT¬otg2otg:L[€€@ #- (usb2-phyìokayeth@30200000rockchip,rv1108-gmacz0  Imacirqeth_wake_irq8ŒpqqrsÒM¬stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macjrmiiÔdefaultâ.ó ìokaysoutput €/interrupt-controller@32010000 arm,gic-400¦» z22 2@ 2`    Ûpinctrlrockchip,rv1108-pinctrló Ì0hgpio0@20030000rockchip,gpio-bankz   (ŒÙ馻Ûgpio1@10310000rockchip,gpio-bankz1  )ŒÙ馻Û/gpio2@10320000rockchip,gpio-bankz2  *ŒÙ馻gpio3@10330000rockchip,gpio-bankz3  +ŒÙ馻pcfg-pull-upõÛ6pcfg-pull-downpcfg-pull-noneÛ3pcfg-pull-none-drv-8maÛ2pcfg-pull-none-drv-12ma Û4pcfg-pull-none-smt-Û5pcfg-pull-up-drv-8maõÛ1pcfg-pull-none-drv-4maÛ7pcfg-pull-up-drv-4maõÛ8pcfg-output-highBpcfg-output-lowNpcfg-input-highõYemmcemmc-bus8€f11111111Û&emmc-clkf2Û$emmc-cmdf 1Û%gmacrmii-pins f333 4 4 4 3333Û.i2c0i2c0-xfer f 5 5Ûi2c1i2c1-xfer f66Û i2c2m1i2c2m1-xfer f33Û i2c2m1-pins f33i2c2m05vi2c2m05v-xfer f33i2c2m05v-pins f33i2c3i2c3-xfer f33Û pwm0pwm0-pinf3Û pwm1pwm1-pinf3Û!pwm2pwm2-pinf3Û"pwm3pwm3-pinf3Û#pwm4pwm4-pinf3Ûpwm5pwm5-pinf3Ûpwm6pwm6-pinf3Ûpwm7pwm7-pinf 3Ûsdmmcsdmmc-clkf7Û'sdmmc-cmdf8Û(sdmmc-cdf8Û)sdmmc-bus1f8sdmmc-bus4@f8888Û*spim0spim0-clkf6spim0-cs0f6spim0-txf6spim0-rxf6spim1spim1-clkf6Û spim1-cs0f6Ûspim1-rxf6Ûspim1-txf6Ûtsadcotp-outf3Ûotp-pinf3Ûuart0uart0-xfer f63Ûuart0-ctsf3uart0-rtsf3uart0-rts-pinf3uart1uart1-xfer f63Ûuart1-ctsf3uart1-rtsf3uart2m0uart2m0-xfer f63Ûuart2m1uart2m1-xfer f63uart2_5vuart2_5v-ctsf3uart2_5v-rtsf3memory@60000000nmemoryz`chosentserial2:1500000n8vsys-regulatorregulator-fixedvsysLK@,LK@XÛ #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3serial0serial1serial2mmc0device_typeregclock-latencyclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleopp-hzopp-microvoltclock-latency-nsinterruptsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsranges#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstclock-namesreg-shiftreg-io-widthdmaspinctrl-namespinctrl-0statusrockchip,grfdma-namesspi-max-frequencyspi-cphaspi-cpol#pwm-cellsrockchip,usbgrfinterrupt-names#phy-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-1pinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cells#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspend#reset-cellsfifo-depthbus-widthcap-mmc-highspeedno-sdno-sdionon-removablemmc-ddr-1_8vmmc-hs200-1_8vphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-path