j?8dL(d(,chipspark,rayeager-px2rockchip,rk3066a 7Rayeager PX2aliases=/ethernet@10204000G/i2c@2002d000L/i2c@2002f000Q/i2c@20056000V/i2c@2005a000[/i2c@2005e000`/mmc@1021c000f/mmc@10214000l/mmc@10218000r/serial@10124000z/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000oscillator ,fixed-clockn6xin24mgpu@10090000",rockchip,rk3066-maliarm,mali-400  buscorex disabledx5!gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu31cache-controller@10138000,arm,pl310-cache?MYHscu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer   local-timer@1013c600,arm,cortex-a9-twd-timer   interrupt-controller@1013d000,arm,cortex-a9-gicavYserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ "baudclkapb_pclk@Lokaytxrxdefault serial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` #baudclkapb_pclkAM disabledtxrxdefaultqos@1012d000,rockchip,rk3066-qossyscon Y)qos@1012e000,rockchip,rk3066-qossyscon Y(qos@1012f000,rockchip,rk3066-qossyscon Y"qos@1012f080,rockchip,rk3066-qossyscon Y$qos@1012f100,rockchip,rk3066-qossyscon Y&qos@1012f180,rockchip,rk3066-qossyscon Y#qos@1012f200,rockchip,rk3066-qossyscon Y%qos@1012f280,rockchip,rk3066-qossyscon Y'usb@10180000,rockchip,rk3066-usbsnps,dwc2 otgotg@@   usb2-phyokayusb@101c0000 ,snps,dwc2 otghost  usb2-phyokaydefault ethernet@10204000,rockchip,rk3066-emac @<  D hclkmacrefd#rmiiokaydefault ,0ethernet-phy@0 ;Ymmc@10214000,rockchip,rk2928-dw-mshc!@ Hbiuciurx-txGQRresetokay^defaultlvmmc@10218000,rockchip,rk2928-dw-mshc! Ibiuciurx-txGRRresetokaydefault lmmc@1021c000,rockchip,rk2928-dw-mshc! Jbiuciurx-txGSRresetokayldefault  !!nand-controller@10500000,rockchip,rk2928-nfcP@ ahb disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3066-power-controllerYpower-domain@7PO"#$%&'power-domain@6 (power-domain@8)grf@20008000,syscon Y dma-controller@20018000,arm,pl330arm,primecell @#.I apb_pclkYdma-controller@2001c000,arm,pl330arm,primecell @#.I apb_pclk disabledi2c@2002d000,rockchip,rk3066-i2c  ( i2cPokaydefault*ak8963@d,asahi-kasei,ak8975 +default,mma8452@1d ,fsl,mma8452+default-i2c@2002f000,rockchip,rk3066-i2c  ) Qi2cokaydefault.tps@2d-/default01`2l2x223322 ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_io2Z2ZvioY3regulator@2vdd_arm '`)vdd1YIregulator@3vcc_ddr '`)vdd2regulator@5vcc18w@w@vdig1regulator@6vdd_11vdig2regulator@7vcc_25&%&%vpllY?regulator@8 vccio_wlw@w@vdacYregulator@9 vcc25_hdmi&%&% vaux1regulator@10vcca_332Z2Z vaux2regulator@11 vcc_rmii2Z2Z vaux33Yregulator@12 vcc28_cif** vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm ;F disableddefault4pwm@20030010,rockchip,rk2928-pwm ;Fokaydefault5watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 3okaypwm@20050020,rockchip,rk2928-pwm  ;Gokaydefault6pwm@20050030,rockchip,rk2928-pwm 0;Gokaydefault7YZi2c@20056000,rockchip,rk3066-i2c ` * Ri2cokaydefault8i2c@2005a000,rockchip,rk3066-i2c  + Si2cokaydefault9i2c@2005e000,rockchip,rk3066-i2c  4 Ti2cokaydefault:serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ $baudclkapb_pclkBNokaytxrxdefault;serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  %baudclkapb_pclkCOokay txrxdefault <=>saradc@2006c000,rockchip,saradc  FGJsaradcapb_pclkW Rsaradc-apbokayX?spi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk &   txrxokaydefault@ABCspi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk ' @  txrx disableddefaultDEFGdma-controller@20078000,arm,pl330arm,primecell @#.I apb_pclkYcpusdrockchip,rk3066-smpcpu@0rcpu,arm,cortex-a9~H8@ Oa* s* 'g8@Icpu@1rcpu,arm,cortex-a9~HIdisplay-subsystem,rockchip,display-subsystemJKsram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop  aclk_vopdclk_vophclk_vop1def Raxiahbdclk disabledportYJendpoint@0LYPvop@1010e000,rockchip,rk3066-vop aclk_vopdclk_vophclk_vop1ghi Raxiahbdclk disabledportYKendpoint@0MYQhdmi@10116000,rockchip,rk3066-hdmi`  @hclkdefaultNO1  disabledportsport@0endpoint@0PYLendpoint@1QYMport@1i2s@10118000,rockchip,rk3066-i2s  defaultRKi2s_clki2s_hclktxrx  disabledi2s@1011a000,rockchip,rk3066-i2s   defaultSLi2s_clki2s_hclktxrx  disabledi2s@1011c000,rockchip,rk3066-i2s  defaultTMi2s_clki2s_hclk  txrx  disabledclock-controller@20000000,rockchip,rk3066a-cru  @^_ ׄ#gрxhрxhYtimer@2000e000,snps,dw-apb-timer-osc  .VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer-osc  ,TB timerpclktimer@2003a000,snps,dw-apb-timer-osc  -UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk F\ Rsaradc-apb disabledphy1,rockchip,rk3066a-usb-phyrockchip,rk3288-usb-phy okayusb-phy@17c)|QphyclkY usb-phy@188)RphyclkY pinctrl,rockchip,rk3066a-pinctrl gpio0@20034000,rockchip,gpio-bank @ 6U4DavY_gpio1@2003c000,rockchip,gpio-bank  7V4DavYgpio2@2003e000,rockchip,gpio-bank  8W4Davgpio3@20080000,rockchip,gpio-bank  9X4DavY]gpio4@20084000,rockchip,gpio-bank @ :Y4DavY+gpio6@2000a000,rockchip,gpio-bank  <Z4DavY/pcfg_pull_defaultPYWpcfg_pull_nonefYUemacemac-xfersUUUUUUUUYemac-mdio sUUYrmii-rstsVYemmcemmc-clksWYemmc-cmds WYemmc-rsts WY hdmihdmi-hpdsWYOhdmii2c-xfer sUUYNi2c0i2c0-xfer sUUY*i2c1i2c1-xfer sUUY.i2c2i2c2-xfer sUUY8i2c3i2c3-xfer sUUY9i2c4i2c4-xfer sUUY:pwm0pwm0-outsUY4pwm1pwm1-outsUY5pwm2pwm2-outsUY6pwm3pwm3-outsUY7spi0spi0-clksWY@spi0-cs0sWYCspi0-txsWYAspi0-rxsWYBspi0-cs1sWspi1spi1-clksWYDspi1-cs0sWYGspi1-rxsWYFspi1-txsWYEspi1-cs1sWuart0uart0-xfer sWWYuart0-ctssWYuart0-rtssWYuart1uart1-xfer sWWYuart1-ctssWuart1-rtssWuart2uart2-xfer sW WY;uart3uart3-xfer sWWY<uart3-ctssWY=uart3-rtssWY>sd0sd0-clksWYsd0-cmds WYsd0-cdsWYsd0-wpsWsd0-bus-width1s Wsd0-bus-width4@s W W W WYsd1sd1-clksWYsd1-cmdsWYsd1-cdsWsd1-wpsWsd1-bus-width1sWsd1-bus-width4@sWWWWYi2s0i2s0-bussWW W W W W WWWYRi2s1i2s1-bus`sWWWWWWYSi2s2i2s2-bus`sWWWWWWYTpcfg-output-highYVak8963comp-intsWY,irir-intsWYXkeyspwr-keysWYYmma8452gsensor-intsWY-mmcsdmmc-pwrsWY^usb_hosthost-drvsWY`hub-rstsVY sata-pwrsWY[sata-resets VY usb_otgotg-drvsWYatpspmic-intsWY0pwr-holdsVY1memory@60000000rmemory`@ir-receiver,gpio-ir-receiver A/defaultXgpio-keys ,gpio-keyspower A/ GPIO PowertdefaultYvdd-log,pwm-regulator Zvdd_logOOB@dO*okayvsys-regulator,regulator-fixedvsysLK@LK@)Y25v-stdby-regulator,regulator-fixed 5v_stdbyLK@LK@)Y\emmc-regulator,regulator-fixed emmc_vccq--2Y!sata-regulator,regulator-fixed +default[usb_5vLK@LK@\sdmmc-regulator,regulator-fixed ]default^vcc_sd2Z2Z3Yusb-host-regulator,regulator-fixed _default` host-pwrLK@LK@\usb-otg-regulator,regulator-fixed _defaultavcc_otgLK@LK@\ #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0i2c0i2c1i2c2i2c3i2c4mshc0mshc1mshc2serial0serial1serial2serial3spi0spi1clock-frequency#clock-cellsclock-output-namesregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelphandleinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesrockchip,grfmax-speedphy-modephyphy-supplyreset-gpiosfifo-depthreset-namesmax-frequencybus-widthdisable-wpvmmc-supplycap-mmc-highspeedcap-sd-highspeednon-removablevqmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsvref-supplyenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportsrangesremote-endpointrockchip,playback-channelsrockchip,capture-channels#sound-dai-cells#reset-cells#phy-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinsoutput-highwakeup-sourcelabellinux,codepwmsvoltage-tablevin-supplyenable-active-highgpiostartup-delay-us