� ��f�8b\(�b$ ,Mele M9 top set box2mele,m9allwinner,sun6i-a31aliases=/soc/ethernet@1c30000G/soc/serial@1c28000chosen OVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi@u3/2w�z�� |disabledframebuffer-lcd002allwinner,simple-framebuffersimple-framebuffer bde_be0-lcd00u3/w�z |disabledtimer2arm,armv7-timer0�   �n6�cpus�allwinner,sun6i-a31 cpu@02arm,cortex-a7�cpu�u��� �a�O� /O� ����SB@�cpu@12arm,cortex-a7�cpu�u��� �a�O� /O� ����SB@�cpu@22arm,cortex-a7�cpu�u��� �a�O� /O� ����SB@�cpu@32arm,cortex-a7�cpu�u��� �a�O� /O� ����SB@� thermal-zonescpu-thermal!�7�Ecooling-mapsmap0U0Z������������������������ ��������tripscpu_alert0ipu��passivecpu_criti��u� �criticalpmu2arm,cortex-a7-pmu0�xyz{clocks Oclk-24M� 2fixed-clock�n6��P�osc24Mclk-32k� 2fixed-clock����P �ext_osc32k9clk-mii-phy-tx� 2fixed-clock�}x@ �mii_phy_tx clk-gmac-int-tx� 2fixed-clock�sY@ �gmac_int_tx clk@1c200d0�2allwinner,sun7i-a20-gmac-clk���u �gmac_tx%display-engine#2allwinner,sun6i-a31-display-engine�  |disabledsoc 2simple-bus Odma-controller@1c020002allwinner,sun6i-a31-dma��  �2u��lcd-controller@1c0c0002allwinner,sun6i-a31-tcon��� �V� �) �lcdlvds u/��ahbtcon-ch0tcon-ch1lvds-alt�tcon0-pixel-clock�ports port@0 �endpoint@0��7endpoint@1��1port@1 �endpoint@1��lcd-controller@1c0d0002allwinner,sun6i-a31-tcon��� �W� �) �lcdlvds u0���ahbtcon-ch0tcon-ch1lvds-alt�tcon1-pixel-clock�ports port@0 �endpoint@0��8endpoint@1��2port@1 �endpoint@1��mmc@1c0f0002allwinner,sun7i-a20-mmc��� uOQP�ahbmmcoutputsample��ahb �<default'|okay 1=Gmmc@1c100002allwinner,sun7i-a20-mmc�� uRTS�ahbmmcoutputsample��ahb �=default' |disabled mmc@1c110002allwinner,sun7i-a20-mmc�� uUWV�ahbmmcoutputsample��ahb �> |disabled mmc@1c120002allwinner,sun7i-a20-mmc��  uXZY�ahbmmcoutputsample� �ahb �? |disabled hdmi@1c160002allwinner,sun6i-a31-hdmi��` �X(u2�� �ahbmodddcpll-0pll-1�Pddc-txddc-rxaudio-tx�   |disabledports port@0 �endpoint@0��endpoint@1��port@1�usb@1c190002allwinner,sun6i-a31-musb���u(� �GZmcjousby�otg |disabledphy@1c194002allwinner,sun6i-a31-usb-phy��������phy_ctrlpmu1pmu2udef�usb0_phyusb1_phyusb2_phy�!�usb0_resetusb1_resetusb2_reset|okay���usb@1c1a000&2allwinner,sun6i-a31-ehcigeneric-ehci��� �Hu)�jousb|okayusb@1c1a400&2allwinner,sun6i-a31-ohcigeneric-ohci��� �Iu+g�jousb |disabledusb@1c1b000&2allwinner,sun6i-a31-ehcigeneric-ehci��� �Ju*�jousb|okayusb@1c1b400&2allwinner,sun6i-a31-ohcigeneric-ohci��� �Ku,h�jousb |disabledusb@1c1c400&2allwinner,sun6i-a31-ohcigeneric-ohci��� �Mu-i� |disabledclock@1c200002allwinner,sun6i-a31-ccu�� u �hosclosc��pinctrl@1c208002allwinner,sun6i-a31-pinctrl�� 0� u@�apbhosclosc���gmac-gmii-pins�PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27gmacgmac-mii-pinsTPA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA27gmac&gmac-rgmii-pinsFPA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA27gmac(i2c0-pins PH14PH15i2c0"i2c1-pins PH16PH17i2c1#i2c2-pins PH18PH19i2c2$lcd0-rgb888-pins�PD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15PD16PD17PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27lcd0mmc0-pinsPF0PF1PF2PF3PF4PF5mmc0+mmc1-pinsPG0PG1PG2PG3PG4PG5mmc1+mmc2-4bit-pinsPC6PC7PC8PC9PC10PC11mmc2+mmc2-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24mmc2+mmc3-8bit-emmc-pins3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC24mmc3(+spdif-tx-pinPH28spdifuart0-ph-pins PH20PH21uart0!timer@1c20c002allwinner,sun4i-a10-timer�� �H�uwatchdog@1c20ca02allwinner,sun6i-a31-wdt�� �  �uspdif@1c2100082allwinner,sun6i-a31-spdif�� � u>c�+ �apbspdif�Prxtx |disabledi2s@1c2200082allwinner,sun6i-a31-i2s��  � uAa�-�apbmod�Prxtx |disabledi2s@1c2240082allwinner,sun6i-a31-i2s��$ �uBb�.�apbmod�Prxtx |disabledlradc@1c228002allwinner,sun4i-a10-lradc-keys��(  � |disabledrtp@1c250002allwinner,sun6i-a31-ts��P �Iserial@1c280002snps,dw-apb-uart�€ �_iuG�3�Prxtx|okaydefault'!serial@1c284002snps,dw-apb-uart�„ �_iuH�4�Prxtx |disabledserial@1c288002snps,dw-apb-uart�ˆ �_iuI�5�Prxtx |disabledserial@1c28c002snps,dw-apb-uart�Œ �_iuJ�6�  Prxtx |disabledserial@1c290002snps,dw-apb-uart� �_iuK�7�  Prxtx |disabledserial@1c294002snps,dw-apb-uart�” �_iuL�8�Prxtx |disabledi2c@1c2ac002allwinner,sun6i-a31-i2c�¬ �uC�/default'" |disabled i2c@1c2b0002allwinner,sun6i-a31-i2c�° �uD�0default'# |disabled i2c@1c2b4002allwinner,sun6i-a31-i2c�´ �uE�1default'$ |disabled i2c@1c2b8002allwinner,sun6i-a31-i2c�¸ � uF�2 |disabled ethernet@1c300002allwinner,sun7i-a20-gmac��T �RZmacirq u!%�stmmacethallwinner_gmac_tx�  �stmmacethv�|okaydefault'&�'�mii�(mdio2snps,dwmac-mdio ethernet-phy@1�'crypto-engine@1c1500062allwinner,sun6i-a31-cryptoallwinner,sun4i-a10-crypto��P �Pu\�ahbmod��ahbcodec@1c22c0082allwinner,sun6i-a31-codec��, �u=� �apbcodec�*�Prxtx |disabledtimer@1c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimer��0�3456u#�spi@1c680002allwinner,sun6i-a31-spi�ƀ �Au$]�ahbmod�Prxtx� |disabled spi@1c690002allwinner,sun6i-a31-spi�Ɛ �Bu%^�ahbmod�Prxtx� |disabled spi@1c6a0002allwinner,sun6i-a31-spi�Ơ �Cu&_�ahbmod�Prxtx� |disabled spi@1c6b0002allwinner,sun6i-a31-spi�ư �Du'`�ahbmod�Prxtx� |disabled interrupt-controller@1c81000 2arm,gic-400 ��� �@ �` �� � display-frontend@1e00000%2allwinner,sun6i-a31-display-frontend�� �]u5|u �ahbmodram�! ports port@1 �endpoint@0��)3endpoint@1��*-display-frontend@1e20000%2allwinner,sun6i-a31-display-frontend�� �^u6}v �ahbmodram�" ports port@1 �endpoint@0��+4endpoint@1��,.display-backend@1e40000$2allwinner,sun6i-a31-display-backend�� �`u4{x �ahbmodram� ports port@0 �endpoint@0��-*endpoint@1��.,port@1 �endpoint@1��/0drc@1e500002allwinner,sun6i-a31-drc�� �[u<�r �ahbmodram�(ports port@0 �endpoint@1��0/port@1 �endpoint@0��1endpoint@1��2display-backend@1e60000$2allwinner,sun6i-a31-display-backend�� �_u3zw �ahbmodram�ports port@0 �endpoint@0��3)endpoint@1��4+port@1�endpoint�56drc@1e700002allwinner,sun6i-a31-drc�� �[u;�q �ahbmodram�'ports port@0�endpoint�65port@1 �endpoint@0��7endpoint@1��8rtc@1f00000�2allwinner,sun6i-a31-rtc��T �()u9�osc32kinterrupt-controller@1f00c002allwinner,sun6i-a31-r-intc����  �  prcm@1f014002allwinner,sun6i-a31-prcm��ar100_clk2allwinner,sun6i-a31-ar100-clk�u  �ar100:ahb0_clk2fixed-factor-clock���u:�ahb0;apb0_clk2allwinner,sun6i-a31-apb0-clk�u;�apb0<apb0_gates_clk#2allwinner,sun6i-a31-apb0-gates-clk�u<D�apb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2c=ir_clk�2allwinner,sun4i-a10-mod0-clk u�ir>apb0_rst 2allwinner,sun6i-a31-clock-reset�?cpucfg@1f01c002allwinner,sun6i-a31-cpuconfig��ir@1f020002allwinner,sun6i-a31-ir u=>�apbir�? �%�� @|okaydefault'@pinctrl@1f02c002allwinner,sun6i-a31-r-pinctrl��, �-.u=�apbhosclosc�?���s-ir-rx-pinPL4s_ir@s-p2wi-pinsPL0PL1s_p2wiAi2c@1f034002allwinner,sun6i-a31-p2wi��4 �'u=����?default'A|okay pmic@682x-powers,axp221�h  � ��ac-power-supply 2x-powers,axp221-ac-power-supply |disabledadc2x-powers,axp221-adc�battery-power-supply%2x-powers,axp221-battery-power-supply |disabledregulators� �dcdc1vcc-3v3#2Z�;2Z�dcdc2vdd-gpu# �`;$@dcdc3vdd-cpu# �`;$@dcdc4 vdd-sys-dll# �`;$@dcdc5 vcc-dram#�`;�`dc1swdc1swdc5ldo vdd-cpus# �`;$@aldo1 vcc-wifi#2Z�;2Z�aldo2aldo2aldo3avcc#)2�;2Z�dldo1vcc-ethernet-phy#2Z�;2Z�(dldo2dldo2dldo3dldo3dldo4 vcc-usb-hub#2Z�;2Z�eldo1eldo1eldo2eldo2eldo3eldo3ldo_io0ldo_io0 |disabledldo_io1ldo_io1 |disabledrtc_ldo#-��;-��rtc_ldodrivevbus drivevbus |disabledusb_power_supply!2x-powers,axp221-usb-power-supply |disabledahci-5v2regulator-fixedahci-5v#LK@;LK@Sex |disabledusb0-vbus2regulator-fixed usb0-vbus#LK@;LK@ex  |disabledusb1-vbus2regulator-fixed usb1-vbus#LK@;LK@Sex|okayusb2-vbus2regulator-fixed usb2-vbus#LK@;LK@Sex |disabledvcc3v02regulator-fixedvcc3v0#-��;-��vcc3v32regulator-fixedvcc3v3#2Z�;2Z�vcc5v02regulator-fixedvcc5v0#LK@;LK@leds 2gpio-ledsled }m9:blue:pwrJ �on interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusinterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methoddevice_typeregclock-latencyoperating-points#cooling-cellscpu-supplyphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-accuracyclock-output-namesallwinner,pipelinesresets#dma-cellsdmasreset-namesclock-namesremote-endpointallwinner,tcon-channelpinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpiosdma-namesinterrupt-namesphysphy-namesextcondr_modereg-names#phy-cellsusb1_vbus-supplyusb2_vbus-supply#reset-cellsgpio-controllerinterrupt-controller#interrupt-cells#gpio-cellspinsfunctiondrive-strengthbias-pull-up#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthsnps,pblsnps,fixed-burstsnps,force_sf_dma_modephy-handlephy-modephy-supplyclock-divclock-mult#io-channel-cellsx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiolabeldefault-state