� ��*P8'`(�'(%xlnx,zynq-zc770-xm010xlnx,zynq-7000&Xilinx ZC770 XM010 boardcpuscpu@0arm,cortex-a9,cpu8<C�Q] ,+B@B@ncpu@1arm,cortex-a9,cpu8<nfpga-full fpga-regionvpmu@f8891000arm,cortex-a9-pmu��8����0fixedregulatorregulator-fixed�VCCPINT�B@�B@��nreplicator arm,coresight-static-replicator<./apb_pclkdbg_trcdbg_apbout-portsport@08endpointn port@18endpointn in-portsportendpointn axi simple-bus�adc@f8007100xlnx,zynq-xadc-1.00.a8�q  ��< can@e0008000xlnx,zynq-can-1.0#okay<$ can_clkpclk8�� ��*@8@can@e0009000xlnx,zynq-can-1.0 #disabled<% can_clkpclk8�� �3�*@8@gpio@e000a000xlnx,zynq-gpio-1.0F<*Rbw� �8��i2c@e0004000cdns,i2c-r1p10#okay<&� �8�@��eeprom@52 atmel,24c028Ri2c@e0005000cdns,i2c-r1p10 #disabled<'� �08�Pinterrupt-controller@f8f01000arm,cortex-a9-gicwb8����ncache-controller@f8f02000arm,pl310-cache8��  � � ���memory-controller@f8006000xlnx,zynq-ddrc-a058�`serial@e0000000xlnx,xuartpscdns,uart-r1p8 #disabled<(uart_clkpclk8� �serial@e0001000xlnx,xuartpscdns,uart-r1p8#okay<)uart_clkpclk8� �2spi@e0006000xlnx,zynq-spi-r1p68�` #disabled� �<" ref_clkpclkspi@e0007000xlnx,zynq-spi-r1p68�p#okay� �1<# ref_clkpclk��flash@1sst25wf080jedec,spi-nor8�B@partitionsfixed-partitionspartition@0�data8ethernet@e000b000cdns,zynq-gemcdns,gem8��#okay �< pclkhclktx_clk rgmii-id ethernet-phy@78 ,ethernet-phynethernet@e000c000cdns,zynq-gemcdns,gem8�� #disabled �-<pclkhclktx_clkmemory-controller@e000e000!arm,pl353-smc-r2p1arm,primecell8�� #disabledmemclkapb_pclk< ,0���nand-controller@0,0arm,pl353-nand-r2p1 8 #disabledmmc@e0100000arasan,sdhci-8.9a#okayclk_xinclk_ahb< � �8�mmc@e0101000arasan,sdhci-8.9a #disabledclk_xinclk_ahb<!� �/8�slcr@f8000000!xlnx,zynq-slcrsysconsimple-mfd8�n clkc@100xlnx,ps7-clkc!j-armpllddrplliopllcpu_6or4xcpu_3or2xcpu_2xcpu_1xddr2xddr3xdcilqspismcpcapgem0gem1fclk0fclk1fclk2fclk3can0can1sdio0sdio1uart0uart1spi0spi1dmausb0_aperusb1_apergem0_apergem1_apersdio0_apersdio1_aperspi0_aperspi1_apercan0_apercan1_aperi2c0_aperi2c1_aperuart0_aperuart1_apergpio_aperlqspi_apersmc_aperswdtdbg_trcdbg_apb8nrstc@200xlnx,zynq-reset8H@M pinctrl@700xlnx,pinctrl-zynq8M dmac@f8003000arm,pl330arm,primecell8�0�.Tabortdma0dma1dma2dma3dma4dma5dma6dma7l� ()*+do}< apb_pclkdevcfg@f8007000xlnx,zynq-devcfg-1.08�p� �< ref_clkM ntimer@f8f00200arm,cortex-a9-global-timer8��  � �<timer@f8001000�$�    cdns,ttc<8�timer@f8002000�$�%&' cdns,ttc<8� timer@f8f00600� � arm,cortex-a9-twd-timer8�� <usb@e0002000"xlnx,zynq-usb-2.20achipidea,usb2#okay<� �8� �ulpi�host� usb@e0003000"xlnx,zynq-usb-2.20achipidea,usb2 #disabled<� �,8�0�ulpiwatchdog@f8005000<-cdns,wdt-r1p2� � 8�P� etb@f8801000"arm,coresight-etb10arm,primecell8��<./apb_pclkdbg_trcdbg_apbin-portsportendpoint ntpiu@f8803000!arm,coresight-tpiuarm,primecell8��0<./apb_pclkdbg_trcdbg_apbin-portsportendpoint nfunnel@f8804000*arm,coresight-static-funnelarm,primecell8��@<./apb_pclkdbg_trcdbg_apbout-portsportendpoint nin-portsport@08endpointnport@18endpointnport@28endpointptm@f889c000"arm,coresight-etm3xarm,primecell8���<./apb_pclkdbg_trcdbg_apb�out-portsportendpointnptm@f889d000"arm,coresight-etm3xarm,primecell8���<./apb_pclkdbg_trcdbg_apb�out-portsportendpointnaliases�/axi/ethernet@e000b000�/axi/i2c@e0004000�/axi/serial@e0001000�/axi/spi@e0007000chosen��serial0:115200n8memory@0,memory8@phy0usb-nop-xceiv�n  #address-cells#size-cellscompatiblemodeldevice_typeregclocksclock-latencycpu0-supplyoperating-pointsphandlefpga-mgrrangesinterruptsinterrupt-parentregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onclock-namesremote-endpointstatustx-fifo-depthrx-fifo-depth#gpio-cellsgpio-controllerinterrupt-controller#interrupt-cellsclock-frequencyarm,data-latencyarm,tag-latencycache-unifiedcache-levelnum-csis-decoded-csspi-max-frequencylabelphy-modephy-handle#clock-cellsfclk-enableclock-output-names#reset-cellssysconinterrupt-names#dma-cells#dma-channels#dma-requestsphy_typedr_modeusb-phytimeout-seccpuethernet0i2c0serial0spi1bootargsstdout-path#phy-cells