� ��֩8��( �ʴhugsun,x99rockchip,rk3399 +7Hugsun X99 TV BOXaliases=/ethernet@fe300000G/i2c@ff3c0000L/i2c@ff110000Q/i2c@ff120000V/i2c@ff130000[/i2c@ff3d0000`/i2c@ff140000e/i2c@ff150000j/i2c@ff160000o/i2c@ff3e0000t/dwmmc@fe310000y/dwmmc@fe320000~/sdhci@fe330000�/serial@ff180000�/serial@ff190000�/serial@ff1a0000�/serial@ff1b0000�/serial@ff370000cpus+cpu-mapcluster0core0�core1�core2�core3�cluster1core0�core1�cpu@0�cpuarm,cortex-a53��psci�����d  4 ?cpu@1�cpuarm,cortex-a53��psci�����d  4 ?cpu@2�cpuarm,cortex-a53��psci�����d  4 ?cpu@3�cpuarm,cortex-a53��psci�����d  4 ?cpu@100�cpuarm,cortex-a72��psci�� ���  4?cpu@101�cpuarm,cortex-a72��psci�� ���  4?idle-statesGpscicpu-sleeparm,idle-stateTe|x����? cluster-sleeparm,idle-stateTe|�����? display-subsystemrockchip,display-subsystem�pmu_a53arm,cortex-a53-pmu�pmu_a72arm,cortex-a72-pmu�psci arm,psci-1.0�smctimerarm,armv8-timer@�   �xin24m fixed-clock�n6�xin24m�amba simple-bus+dma-controller@ff6d0000arm,pl330arm,primecell��m@ � �� apb_pclk?Ydma-controller@ff6e0000arm,pl330arm,primecell��n@ � �� apb_pclk?Hpcie@f8000000rockchip,rk3399-pcie ���$axi-baseapb-base�pci+.?K ���G�aclkaclk-perfhclkpm0�123Usyslegacycliente`x�� �,�pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-38���������8��������(�coremgmtmgmt-stickypipepmpclkaclk �disabledinterrupt-controller�.?ethernet@fe300000rockchip,rk3399-gmac��0� Umacirq8�ighfj�fMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac��� �stmmaceth��okay��input*5rgmii>defaultL Vf |'�P�(�dwmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��1@�@��р ��M��biuciuciu-driveciu-sample���y�reset�okay���������>default L+wifi@1brcm,bcm4329-fmac� � Uhost-wake>defaultL!dwmmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc��2@�A��р��! �� ��L��biuciuciu-driveciu-sample���z�reset�okay��р6 @�рI�U�gr">defaultL#$%& sdhci@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.1��3� ��N! ���N�clk_xinclk_ahb�emmc_cardclock��' �phy_arasan���okay�����?�usb@fe380000 generic-ehci��8����(usbhostarbiterutmi�)�usb�okayusb@fe3a0000 generic-ohci��:����(usbhostarbiterutmi�)�usb�okayusb@fe3c0000 generic-ehci��<����*usbhostarbiterutmi�+�usb�okayusb@fe3e0000 generic-ohci��>� ���*usbhostarbiterutmi�+�usb�okayusb@fe800000rockchip,rk3399-dwc3+0�������Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�% �usb3-otg�okayusb@fe800000 snps,dwc3����i����refbus_earlysuspend�host�,-�usb2-phyusb3-phy �utmi_wide9Rs��okayusb@fe900000rockchip,rk3399-dwc3+0�������Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk�& �usb3-otg�okayusb@fe900000 snps,dwc3����n����refbus_earlysuspend�host�./�usb2-phyusb3-phy �utmi_wide9Rs��okaydp@fec00000rockchip,rk3399-cdn-dp���� �r�!�� �� �ru�ocore-clkpclkspdifgrf�01� �HJ��spdifdptxapbcore�� �disabledportsport+endpoint@0��2?�endpoint@1��3?�interrupt-controller@fee00000 arm,gic-v3.+�P����� ������� ?interrupt-controller@fee20000arm,gic-v3-its����?ppi-partitionsinterrupt-partition-0�?interrupt-partition-1�?saradc@ff100000rockchip,rk3399-saradc���>��Pesaradcapb_pclk�� �saradc-apb�okay�4i2c@ff110000rockchip,rk3399-i2c���A! ���AU i2cpclk�;>defaultL5+�okay�,i2c@ff120000rockchip,rk3399-i2c���B! ���BV i2cpclk�#>defaultL6+ �disabledi2c@ff130000rockchip,rk3399-i2c���C! ���CW i2cpclk�">defaultL7+�okay��?�i2c@ff140000rockchip,rk3399-i2c���D! ���DX i2cpclk�&>defaultL8+ �disabledi2c@ff150000rockchip,rk3399-i2c���E! ���EY i2cpclk�%>defaultL9+ �disabledi2c@ff160000rockchip,rk3399-i2c���F! ���FZ i2cpclk�$>defaultL:+�okayserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uart���Q`baudclkapb_pclk�c%>default L;<=�okaybluetoothbrcm,bcm43438-bt�> ext_clock 2? F  X g= >default L@ABqC}Dserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uart���Rabaudclkapb_pclk�b%>defaultLE �disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uart���Sbbaudclkapb_pclk�d%>defaultLF�okayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uart���Tcbaudclkapb_pclk�e%>defaultLG �disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spi���G[spiclkapb_pclk�D�H H �txrx>defaultLIJKL+ �disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spi���H\spiclkapb_pclk�5�H H �txrx>defaultLMNOP+�okay����flash@0jedec,spi-nor+�����spi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spi���I]spiclkapb_pclk�4�HH�txrx>defaultLQRST+ �disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spi���J^spiclkapb_pclk�C�HH�txrx>defaultLUVWX+ �disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi�� �K_spiclkapb_pclk���YY �txrx>defaultLZ[\]�+ �disabledthermal-zonescpu�d���^tripscpu_alert0�p���passive?_cpu_alert1�$����passive?`cpu_crit�s�� �criticalcooling-mapsmap0�_����������������map1�`H������������������������������������������������gpu�d���^tripsgpu_alert0�$����passivegpu_crit�s�� �criticaltsadc@ff260000rockchip,rk3399-tsadc��&�a�O! q��Odtsadcapb_pclk�� �tsadc-apb���>initdefaultsleepLa*b4a>�okayTk?^qos@ffa58000syscon���� ?jqos@ffa5c000syscon���� ?kqos@ffa60080syscon���� qos@ffa60100syscon��� qos@ffa60180syscon���� qos@ffa70000syscon��� ?nqos@ffa70080syscon���� ?oqos@ffa74000syscon���@ ?lqos@ffa76000syscon���` ?mqos@ffa90000syscon��� ?pqos@ffa98000syscon���� ?cqos@ffaa0000syscon��� ?qqos@ffaa0080syscon���� ?rqos@ffaa8000syscon���� ?sqos@ffaa8080syscon����� ?tqos@ffab0000syscon��� ?dqos@ffab0080syscon���� ?eqos@ffab8000syscon���� ?fqos@ffac0000syscon��� ?gqos@ffac0080syscon���� ?hqos@ffac8000syscon���� ?uqos@ffac8080syscon����� ?vqos@ffad0000syscon��� ?wqos@ffad8080syscon����� qos@ffae0000syscon��� ?ipower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd��1power-controller!rockchip,rk3399-power-controller�+?pd_iep@34�"����cpd_rga@33�!����depd_vcodec@31�����fpd_vdu@32� ����ghpd_gpu@35�#���ipd_edp@25��lpd_emmc@23����jpd_gmac@22���f�kpd_sd@27���L�lpd_sdioaudio@28����mpd_usb3@24����nopd_vio@15�+pd_hdcp@21����r�ppd_isp0@19�����qrpd_isp1@20�����stpd_tcpc0@RK3399_PD_TCPC0��~}pd_tcpc1@RK3399_PD_TCPC1� ��pd_vo@16�+pd_vopb@17�����uvpd_vopl@18�����wsyscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd��2+?�io-domains&rockchip,rk3399-pmu-io-voltage-domain�okay�Dspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi��5�xxspiclkapb_pclk�<>defaultLyz{|+ �disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart��7�xx"baudclkapb_pclk�f%>defaultL} �disabledi2c@ff3c0000rockchip,rk3399-i2c��<�x ! ���x x i2cpclk�9>defaultL~+�okay����syr827@40silergy,syr827�@ �fan53555-regL �vdd_cpu_b� �4��`�6J\�?regulator-state-memgsyr828@41silergy,syr828�A �fan53555-regL��vdd_gpu� �4��`�6J\��?�regulator-state-memgpmic@1brockchip,rk808� ��>defaultL�����xin32krtc_clko_wifi���������� � C � &� 3� @C}D?>regulatorsDCDC_REG1 �vdd_center� ��� ��q6Jregulator-state-memgDCDC_REG2 �vdd_cpu_l� q���pq6J? regulator-state-memgDCDC_REG3�vcc_ddr6Jregulator-state-mem MDCDC_REG4�vcc_1v8�w@�w@6J?Dregulator-state-mem M ew@LDO_REG1 �vcc1v8_dvp�w@�w@6Jregulator-state-mem M ew@LDO_REG2 �vcca1v8_hdmi�w@�w@6Jregulator-state-mem M ew@LDO_REG3 �vcca_1v8�w@�w@6Jregulator-state-mem M ew@LDO_REG4�vcc_sd�w@�2Z�6J?"regulator-state-mem M e2Z�LDO_REG5 �vcc3v0_sd�-���-��6Jregulator-state-mem M e-��LDO_REG6�vcc_1v5��`��`6Jregulator-state-mem M e�`LDO_REG7 �vcca0v9_hdmi� ��� ��6Jregulator-state-mem M e ��LDO_REG8�vcc_3v0�-���-��6J?�regulator-state-mem M e-��SWITCH_REG1 �vcc3v3_s36Jregulator-state-mem MSWITCH_REG2 �vcc3v3_s06Jregulator-state-mem Mi2c@ff3d0000rockchip,rk3399-i2c��=�x ! ���x x i2cpclk�8>defaultL�+�okay�X(typec-portc@22 fcs,fusb302�" ��>defaultL� ���okayi2c@ff3e0000rockchip,rk3399-i2c��>�x ! ���x x i2cpclk�:>defaultL�+ �disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwm��B �>defaultL��xpwm�okaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwm��B �>defaultL��xpwm �disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwm��B  �>defaultL��xpwm�okay?�pwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwm��B0 �>defaultL��xpwm �disabledvideo-codec@ff650000rockchip,rk3399-vpu��e �rq Uvepuvdpu��� aclkhclk ���iommu@ff650800rockchip,iommu��e@�sUvpu_mmu��� aclkiface ��?�iommu@ff660480rockchip,iommu ��f�@�f�@�u Uvdec_mmu��� aclkiface � �disablediommu@ff670800rockchip,iommu��g@�*Uiep_mmu��� aclkiface � �disabledrga@ff680000rockchip,rk3399-rga��h�7���maclkhclksclk�jgi �coreaxiahb�!efuse@ff690000rockchip,rk3399-efuse��i�+�} pclk_efusecpu-id@7�cpu-leakage@17�gpu-leakage@18�center-leakage@19�cpu-leakage@1a�logic-leakage@1b�wafer-info@1c�pmu-clock-controller@ff750000rockchip,rk3399-pmucru��u��� ��x!(J�?xclock-controller@ff760000rockchip,rk3399-cru��v�� �����@��B��C��x@!#g��/�;���рxh�<4`�������#�F�����ׄׄ �� ��?syscon@ff770000&rockchip,rk3399-grfsysconsimple-mfd��w+?io-domains"rockchip,rk3399-io-voltage-domain�okay �4 �4 �� �"usb2-phy@e450rockchip,rk3399-usb2phy��P�{phyclk��clk_usbphy0_480m�okay?(host-port �� Ulinestate�okay*�?)otg-port �0�ghjUotg-bvalidotg-idlinestate�okay?,usb2-phy@e460rockchip,rk3399-usb2phy��`�|phyclk��clk_usbphy1_480m�okay?*host-port �� Ulinestate�okay*�?+otg-port �0�lmoUotg-bvalidotg-idlinestate�okay?.phy@f780rockchip,rk3399-emmc-phy���$��emmcclk ��okay?'pcie-phyrockchip,rk3399-pcie-phy��refclk ��� �2�phy �disabled?phy@ff7c0000rockchip,rk3399-typec-phy��|�~}tcpdcoretcpdphy-ref�~!�������L�uphyuphy-pipeuphy-tcphy��okaydp-port �?0usb3-port �?-phy@ff800000rockchip,rk3399-typec-phy�����tcpdcoretcpdphy-ref��!���� ���M�uphyuphy-pipeuphy-tcphy��okaydp-port �?1usb3-port �?/watchdog@ff848000 snps,dw-wdt�����|�xrktimer@ff850000rockchip,rk3399-timer����Q�hZ pclktimerspdif@ff870000rockchip,rk3399-spdif����B�Y�tx mclkhclk�U�>defaultL����okayi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s�����'�YY�txrxi2s_clki2s_hclk�V�>defaultL����okay  *i2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s����(�YY�txrxi2s_clki2s_hclk�W�>defaultL����okay  *i2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s����)�YY�txrxi2s_clki2s_hclk�X����okay?�vop@ff8f0000rockchip,rk3399-vop-lit���>��w���!ׄ������aclk_vopdclk_vophclk_vop ���� �axiahbdclk �disabledport+?endpoint@0���?�endpoint@1���?�endpoint@2���?�endpoint@3���?�endpoint@4���?3iommu@ff8f3f00rockchip,iommu���?�w Uvopl_mmu��� aclkiface� � �disabled?�vop@ff900000rockchip,rk3399-vop-big���>��v���!ׄ������aclk_vopdclk_vophclk_vop ���� �axiahbdclk�okayport+?endpoint@0���?�endpoint@1���?�endpoint@2���?�endpoint@3���?�endpoint@4���?2iommu@ff903f00rockchip,iommu���?�v Uvopb_mmu��� aclkiface� ��okay?�iommu@ff914000rockchip,iommu ���@��P�+ Uisp0_mmu��� aclkiface �� Diommu@ff924000rockchip,iommu ���@��P�, Uisp1_mmu��� aclkiface �� Dhdmi-soundsimple-audio-card _i2s x �hdmi-sound�okaysimple-audio-card,cpu ��simple-audio-card,codec ��hdmi@ff940000rockchip,rk3399-dw-hdmi����(�tqpoiahbisfrcecgrfvpll�%���okay ��>defaultL�?�portsport+endpoint@0���?�endpoint@1���?�mipi@ff960000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi�����- ��p�orefpclkphy_cfggrf����apb�+ �disabledports+port@0�+endpoint@0���?�endpoint@1���?�mipi@ff968000*rockchip,rk3399-mipi-dsisnps,dw-mipi-dsi������. ��q�orefpclkphy_cfggrf����apb�+ �disabledports+port@0�+endpoint@0���?�endpoint@1���?�edp@ff970000rockchip,rk3399-edp����� �jlo dppclkgrf>defaultL����dp� �disabledports+port@0�+endpoint@0���?�endpoint@1���?�gpu@ff9a0000#rockchip,rk3399-maliarm,mali-t860���0� Ujobmmugpu���#�okay � ��pinctrlrockchip,rk3399-pinctrl� ��+gpio0@ff720000rockchip,gpio-bank��r�x� � ��.? gpio1@ff730000rockchip,gpio-bank��s�x� � ��.?�gpio2@ff780000rockchip,gpio-bank��x�P� � ��.??gpio3@ff788000rockchip,gpio-bank��x��Q� � ��.?gpio4@ff790000rockchip,gpio-bank��y�R� � ��.?�pcfg-pull-up �?�pcfg-pull-down ?�pcfg-pull-none ?�pcfg-pull-none-12ma   ?�pcfg-pull-none-13ma   ?�pcfg-pull-none-18ma  pcfg-pull-none-20ma  pcfg-pull-up-2ma � pcfg-pull-up-8ma � pcfg-pull-up-18ma � pcfg-pull-up-20ma � pcfg-pull-down-4ma  pcfg-pull-down-8ma  pcfg-pull-down-12ma   pcfg-pull-down-18ma  pcfg-pull-down-20ma  pcfg-output-high ,pcfg-output-low 8?�clockclk-32k C�edpedp-hpd C�?�gmacrgmii-pins� C�� � � � ����������?rmii-pins� C � � � � ������rgmii-sleep-pins C�i2c0i2c0-xfer C��?~i2c1i2c1-xfer C��?5i2c2i2c2-xfer C��?6i2c3i2c3-xfer C��?7i2c4i2c4-xfer C � �?�i2c5i2c5-xfer C � �?8i2c6i2c6-xfer C � �?9i2c7i2c7-xfer C��?:i2c8i2c8-xfer C��?�i2s0i2s0-2ch-bus` C������i2s0-8ch-bus� C���������?�i2s1i2s1-2ch-busP C�����?�sdio0sdio0-bus1 C�sdio0-bus4@ C����?sdio0-cmd C�?sdio0-clk C�?sdio0-cd C�sdio0-pwr C�sdio0-bkpwr C�sdio0-wp C�sdio0-int C�sdmmcsdmmc-bus1 C�sdmmc-bus4@ C� � � �?&sdmmc-clk C �?#sdmmc-cmd C �?$sdmmc-cd C�?%sdmmc-wp C�suspendap-pwroff C�ddrio-pwroff C�spdifspdif-bus C�spdif-bus-1 C�?�spi0spi0-clk C�?Ispi0-cs0 C�?Lspi0-cs1 C�spi0-tx C�?Jspi0-rx C�?Kspi1spi1-clk C �?Mspi1-cs0 C �?Pspi1-rx C�?Ospi1-tx C�?Nspi2spi2-clk C �?Qspi2-cs0 C �?Tspi2-rx C �?Sspi2-tx C �?Rspi3spi3-clk C�?yspi3-cs0 C�?|spi3-rx C�?{spi3-tx C�?zspi4spi4-clk C�?Uspi4-cs0 C�?Xspi4-rx C�?Wspi4-tx C�?Vspi5spi5-clk C�?Zspi5-cs0 C�?]spi5-rx C�?\spi5-tx C�?[testclktest-clkout0 C�test-clkout1 C�test-clkout2 C�tsadcotp-gpio C�?aotp-out C�?buart0uart0-xfer C��?;uart0-cts C�?=uart0-rts C�?<uart1uart1-xfer C � �?Euart2auart2a-xfer C� �uart2buart2b-xfer C��uart2cuart2c-xfer C��?Fuart3uart3-xfer C��?Guart3-cts C�uart3-rts C�uart4uart4-xfer C��?}uarthdcpuarthdcp-xfer C��pwm0pwm0-pin C�?�pwm0-pin-pull-down C�vop0-pwm-pin C�vop1-pwm-pin C�pwm1pwm1-pin C�?�pwm1-pin-pull-down C�pwm2pwm2-pin C�pwm2-pin-pull-down C�?�pwm3apwm3a-pin C�?�pwm3bpwm3b-pin C�hdmihdmi-i2c-xfer C��hdmi-cec C�?�pciepci-clkreqn-cpm C�pci-clkreqnb-cpm C�fusb30xfusb0-int C�?�pmicpmic-int-l C�?�vsel1-gpio C�?vsel2-gpio C�?�sdiobt-host-wake-l C�?Abt-reg-on-h C �?@bt-wake-l C�?Bwifi-reg_on-h C �?�wifiwifi-host-wake-l C�?!usb-typecvcc5v0_typec_en C�?�usb2host-vbus-drv C�?�opp-table0operating-points-v2 Q? opp00 \Q� c 5 q�@opp01 \#�F c 5opp02 \0�, c �Popp03 \<� cHopp04 \G�� cB@opp05 \Tfr c*�opp-table1operating-points-v2 Q? opp00 \Q� c 5 q�@opp01 \#�F c 5opp02 \0�, c ��opp03 \<� c Y�opp04 \G�� c~�opp05 \Tfr c��opp06 \_�" c��opp07 \kI� cO�opp-table2operating-points-v2?�opp00 \ �� c 5opp01 \��@ c 5opp02 \ׄ c ��opp03 \�e c Y�opp04 \#�F cHopp05 \/� c��chosen �serial2:1500000n8external-gmac-clock fixed-clock�sY@ �clkin_gmac�?dc-5vregulator-fixed�dc_5v6J�LK@�LK@?�vcc-sysregulator-fixed�vcc_sys�LK@�LK@6\�?�vcc-phy-regulatorregulator-fixed�vcc_phy6J?vcc1v8-s0regulator-fixed �vcc1v8_s0�w@�w@6?4vcc3v3-sysregulator-fixed �vcc3v3_sys�2Z��2Z�6\�?Cvcc5v0-host-regulatorregulator-fixed � a�>defaultL� �vcc5v0_host6?�vcc5v0-typec-regulatorregulator-fixed � a�>defaultL� �vcc5v0_typec6\�?�vcc5v0-usbregulator-fixed �vcc5v0_usb6J�LK@�LK@\�?�vdd-logpwm-regulator ��a� ���vdd_log� 5�\�6Jsdio-pwrseqmmc-pwrseq-simple�> ext_clock>defaultL� � ? compatibleinterrupt-parent#address-cells#size-cellsmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8mmc0mmc1mmc2serial0serial1serial2serial3serial4cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-usportsinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsranges#dma-cellsclock-namesreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesresetsreset-namesstatusinterrupt-controllerpower-domainsrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modepinctrl-namespinctrl-0snps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delaymax-frequencyfifo-depthbus-widthcap-sdio-irqcap-sd-highspeedkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clock-ratesclock-freq-min-maxsupports-sdcap-mmc-highspeeddisable-wpvqmmc-supplycard-detect-delayarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs400-1_8vmmc-hs400-enhanced-strobesupports-emmcdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controlleraffinity#io-channel-cellsvref-supplyi2c-scl-rising-time-nsi2c-scl-falling-time-nsreg-shiftreg-io-widthdevice-wakeup-gpioshost-wakeup-gpiosshutdown-gpiosmax-speedvbat-supplyvddio-supplydmasdma-namesmax-freqspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplyregulator-compatibleregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayfcs,suspend-voltage-selectorregulator-always-onregulator-boot-onvin-supplyregulator-off-in-suspendregulator-initial-moderockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-on-in-suspendregulator-suspend-microvoltvbus-supply#pwm-cellsiommus#iommu-cells#reset-cellsaudio-supplybt656-supplygpio1830-supplysdmmc-supply#phy-cellsdrive-impedance-ohmrockchip,playback-channelsrockchip,capture-channelsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiddc-i2c-busmali-supplyrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowrockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathenable-active-highpwmspwm-supplyreset-gpios