8`((STiH418 B2264!st,stih418-b2264st,stih418clk-sysin, !fixed-clock9À ICLK_SYSIN\clk-tmdsout-hdmi, !fixed-clock9\ clocksd!st,stih418-clksimple-busclockgen-a9@92b0000!st,clkgen-c32k +clockgen-a9-pll,!st,stih418-clkgen-plla9o\clk-m-a9,'!st,stih407-clkgen-a9-muxst,clkgen-muxo \clk-m-a9-periphs,!fixed-factor-clockov\]clockgen-a@90ff000!st,clkgen-c32k clk-s-a0-pll,!st,clkgen-pll0-a0o\clk-s-a0-flexgen!!st,flexgenst,flexgen-stih410-a0, oclockgen-c@9103000!st,clkgen-c32k 0clk-s-c0-pll0,!st,clkgen-pll0-c0o\clk-s-c0-pll1,!st,clkgen-pll1-c0o\clk-s-c0-quadfs,!st,quadfs-pllo\ clk-s-c0-flexgen,!!st,flexgenst,flexgen-stih418-c04o   \clk-m-a9-ext2f-div2s,!fixed-factor-clocko Iclk-m-a9-ext2f-div2v\clockgen-d0@9104000!st,clkgen-c32k @clk-s-d0-quadfs, !st,quadfs-d0o\ clk-s-d0-flexgen,!!st,flexgenst,flexgen-stih410-d0$o   \Uclockgen-d2@9106000!st,clkgen-c32k `clk-s-d2-quadfs, !st,quadfs-d2o\ clk-s-d2-flexgen,!!st,flexgenst,flexgen-stih418-d2,o    clockgen-d3@9107000!st,clkgen-c32k pclk-s-d3-quadfs, !st,quadfs-d3o\ clk-s-d3-flexgen,!!st,flexgenst,flexgen-stih407-d3$o   \Ealiases-/soc/pin-controller-sbc@961f080/gpio@9610000-/soc/pin-controller-sbc@961f080/gpio@9611000-/soc/pin-controller-sbc@961f080/gpio@9612000-/soc/pin-controller-sbc@961f080/gpio@9613000-/soc/pin-controller-sbc@961f080/gpio@9614000-/soc/pin-controller-sbc@961f080/gpio@9615000//soc/pin-controller-front0@920f080/pio@9200000//soc/pin-controller-front0@920f080/pio@9201000//soc/pin-controller-front0@920f080/pio@9202000//soc/pin-controller-front0@920f080/pio@9203000//soc/pin-controller-front0@920f080/pio@9204000//soc/pin-controller-front0@920f080/pio@9205000//soc/pin-controller-front0@920f080/pio@9206000//soc/pin-controller-front0@920f080/pio@9207000//soc/pin-controller-front0@920f080/pio@9208000//soc/pin-controller-front0@920f080/pio@9209000//soc/pin-controller-front1@921f080/pio@9210000./soc/pin-controller-rear@922f080/gpio@9220000./soc/pin-controller-rear@922f080/gpio@9221000./soc/pin-controller-rear@922f080/gpio@9222000. /soc/pin-controller-rear@922f080/gpio@9223000./soc/pin-controller-rear@922f080/gpio@9224000./soc/pin-controller-rear@922f080/gpio@9225000/"/soc/pin-controller-flash@923f080/gpio@9230000/)/soc/pin-controller-flash@923f080/gpio@9231000/0/soc/pin-controller-flash@923f080/gpio@92320007/soc/serial@9530000>/soc/dwmac@9630000socHd !simple-buspin-controller-sbc@961f080!st,stih407-sbc-pinctrlYk acirqmux mxirqmux d a`gpio@9610000kPIO0\gpio@9611000kPIO1\gpio@9612000k PIO2\gpio@9613000k0PIO3\gpio@9614000k@PIO4\gpio@9615000kPPIO5?\cec0cec0-defaultst,pins rcir0st,pinsuhf0st,pinstx0st,pinstx_od0st,pinssbc_serial0sbc_serial0-0\0st,pinssbc_serial1sbc_serial1-0\1st,pinsi2c10i2c10-default\8st,pins  i2c11i2c11-default\9st,pins  keyscankeyscanst,pins &.6>gmac1rgmii1-0\Sst,pinsFKPUZ_e,j,o,t,y,~rgmii1-mdiost,pinsrgmii1-mdio-1\Tst,pinsmii1st,pinsFKPUZ_ejoty~rmii1-0st,pinsFKZejyrmii1_phyclkst,pinsrmii1_phyclk_extst,pinspwm1pwm1-0-default\Nst,pinspwm1-1-default\Ost,pinspwm1-2-default\Pst,pinspwm1-3-default\Qst,pinsspi10spi10-4w-alt1-0\?st,pinsspi10-3w-alt1-0st,pinsspi11spi11-4w-alt2-0\@st,pinsspi11-3w-alt2-0st,pinsspi12spi12-4w-alt2-0\Ast,pinsspi12-3w-alt2-0st,pinspin-controller-front0@920f080!st,stih407-front-pinctrlYk cirqmux mxirqmux d pio@9200000kPIO10\pio@9201000kPIO11\pio@9202000k PIO12\pio@9203000k0PIO13\pio@9204000k@PIO14\ pio@9205000kPPIO15\pio@9206000k`PIO16\pio@9207000kpPIO17\pio@9208000kPIO18\pio@9209000kPIO19\serial0serial0-0st,pinsserial0-0_hw_flowctrlst,pinsserial1serial1-0\.st,pinsserial2serial2-0\/st,pinsmmc1sd1-0\Cst,pins   i2c0i2c0-default\2st,pins  i2c1i2c1-default\3st,pins  i2c2i2c2-default\4st,pins  i2c2-alt2-1st,pins  i2c3i2c3-alt1-0\5st,pins  i2c3-alt1-1st,pins  i2c3-alt3-0st,pins  spi0spi0-4w-alt2-0\:st,pinsspi0-3w-alt2-0st,pinsspi0-4w-alt1-0st,pinsspi0-3w-alt1-0st,pinsspi1spi1-4w-alt2-0\;st,pinsspi1-3w-alt2-0st,pinsspi1-4w-alt1-0st,pins   spi1-3w-alt1-0st,pins  spi2spi2-4w-alt2-0\<st,pinsspi2-3w-alt2-0st,pinsspi2-4w-alt1-0st,pins   spi2-3w-alt1-0st,pins  spi2-4w-alt2-1st,pinsspi2-3w-alt2-1st,pinsspi3spi3-4w-alt3-0\=st,pinsspi3-3w-alt3-0st,pinsspi3-4w-alt1-0st,pinsspi3-3w-alt1-0st,pinsspi3-4w-alt1-1st,pinsspi3-3w-alt1-1st,pinstsin0tsin0_parallelst,pins&,28>DJPV \bhtsin0_serialst,pins&V \bhtsin1tsin1_parallelst,pins&,28>DJPV \bhtsin1_serialst,pins&V \bhtsin2tsin2_parallelst,pins&,28> D J P V \bhtsin2_serialst,pins&V \bhtsin3tsin3_serialst,pins& V  \bhtsin4tsin4_serial_alt3st,pins& V  \ b h tsin5tsin5_serial_alt1st,pins&V \bhtsin5_serial_alt2st,pins&V \bhtsout0tsout0_parallelst,pins&,28>DJPV\bhtsout0_serialst,pins&V\bhtsout1tsout1_serialst,pins&V\bhmtsin0mtsin0_parallelst,pins&,28>DJPV \bhsystracesystrace-defaultst,pinsnxpin-controller-front1@921f080!st,stih407-front-pinctrlYk !cirqmux mxirqmux d !pio@9210000kPIO20\!tsin4tsin4_serial_alt1st,pins&!V! \!b!h!pin-controller-rear@922f080!st,stih407-rear-pinctrlY"k "cirqmux mxirqmux d "`gpio@9220000kPIO30\#gpio@9221000kPIO31\&gpio@9222000k PIO32\(gpio@9223000k0PIO33\'gpio@9224000k@PIO34\$gpio@9225000kPPIO35\%i2c4i2c4-default\6st,pins# # i2c5i2c5-default\7st,pins$ $ usb3usb3-2\Jst,pins%%%pwm0pwm0-0-default\Mst,pins&&spi4spi4-4w-alt1-0\>st,pins###spi4-3w-alt1-0st,pins##spi4-4w-alt3-0st,pins$$$spi4-3w-alt3-0st,pins$$i2s_outi2s_8ch_outst,pins'''r'|$$$i2s_2ch_outst,pins'''r'i2s_ini2s_8ch_inst,pins(((r(|''''i2s_2ch_inst,pins(((r(spdif_outspdif_outst,pins$serial3serial3-0st,pins&&usb0usb2-0\Xst,pins%%usb1usb2-1\Zst,pins%%pin-controller-flash@923f080!st,stih407-flash-pinctrlY)k #cirqmux mxirqmux d #0gpio@9230000kPIO40\*gpio@9231000kPIO41\+gpio@9232000k PIO42\,mmc0mmc0-0\Bst,pins* *++ +++$+,+4+sd0-0st,pins* *++++ ,,<,, ,fsmfsm\Fst,pinsD*P*[*h*u**nandnandst,pins**+ + + + + + + + ,,,,, ,sbc-syscfg@9620000!st,stih407-sbc-syscfgsysconk b\front-syscfg@9280000!st,stih407-front-syscfgsysconk (\rear-syscfg@9290000!st,stih407-rear-syscfgsysconk )\"flash-syscfg@92a0000!st,stih407-flash-syscfgsysconk *\)fvdp-lite-syscfg@9600000!!st,stih407-sbc-reg-syscfgsysconk `\Rcore-syscfg@92b0000!st,stih407-core-syscfgsysconk +\-sti-sasg-codec!st,stih407-sas-codec #disabledY-lpm-syscfg@94b5100!st,stih407-lpm-syscfgsysconk KQsti-vtg-main@8d02800!st,vtgk( mlsti-vtg-aux@8d00200!st,vtgk mmserial@9830000!st,asck , mzo  #disabledserial@9831000!st,asck , m{*default8.o  #disabledserial@9832000!st,asck , m|*default8/o  #disabledserial@9530000!st,asck S, m*default80o#okayserial@9531000!st,asck S, m*default81o #disabledi2c@9840000!st,comms-ssc4-i2c mpk o Bssc9*default82 #disabledi2c@9841000!st,comms-ssc4-i2ck  mqo Bssc9*default83 #disabledi2c@9842000!st,comms-ssc4-i2ck  mro Bssc9*default84 #disabledi2c@9843000!st,comms-ssc4-i2ck 0 mso Bssc9*default85 #disabledi2c@9844000!st,comms-ssc4-i2ck @ mto Bssc9*default86 #disabledi2c@9845000!st,comms-ssc4-i2ck P muo Bssc9*default87 #disabledi2c@9540000!st,comms-ssc4-i2ck T moBssc9*default88 #disabledi2c@9541000!st,comms-ssc4-i2ck T moBssc9*default89 #disabledspi@9840000!st,comms-ssc4-spik  mpo Bssc8:*default #disabledspi@9841000!st,comms-ssc4-spik  mqo Bssc*default8; #disabledspi@9842000!st,comms-ssc4-spik  mro Bssc*default8< #disabledspi@9843000!st,comms-ssc4-spik 0 mso Bssc*default8= #disabledspi@9844000!st,comms-ssc4-spik @ mto Bssc*default8> #disabledspi@9540000!st,comms-ssc4-spik T moBssc*default8? #disabledspi@9541000!st,comms-ssc4-spik T moBssc*default8@ #disabledspi@9542000!st,comms-ssc4-spik T  moBssc*default8A #disabledsdhci@9060000!st,sdhci-stih407st,sdhci#okayk   cmmctop-mmc-delay m\xmmcirq*default8BBmmcicno NX h sdhci@9080000!st,sdhci-stih407st,sdhci #disabledk cmmc mZxmmcirq*default8CBmmcicno DNlpc@8787000!st,stih407-lpckxp moExY-lpc@8788000!st,stih407-lpckx moEspifsm@9022000 !st,spi-fsmk  cspi-fsmoBemi_clk*default8FY-h#okaysata@9b20000!st,ahcik  mxhostcG ahci_phyH DD pwr-dwnsw-rstpwr-rst Bahci_clko #okaysata@9b28000!st,ahcik  mxhostcI ahci_phyHDD pwr-dwnsw-rstpwr-rst Bahci_clko  #disableddwc3@8f94000!st,stih407-dwc3k@creg-gluesyscfg-regY-HD powerdownsoftreset*default8Jd#okaydwc3@9900000 !snps,dwc3k  mhostusb2-phyusb3-phy KLpwm@9810000 !st,sti-pwm'k h m*default8MBpwmo2 #disabledpwm@9510000 !st,sti-pwm'k Qh m*default8NOPQBpwmo2#okay\^rng@8a89000!st,rngko#okayrng@8a8a000!st,rngko #disableddwmac@9630000Bnetwork#okay-!st,stih407-dwmacsnps,dwmacsnps,dwmac-3.710k ccstmmacethsti-ethconfNRXD stmmacethmbcxmacirqeth_wake_irqc*default8STBstmmacethsti-ethclko lrgmiiuclkgen  'B@mailbox@8f00000!st,stih407-mailboxk ma9#okay\amailbox@8f01000!st,stih407-mailboxk st231_gp_1#okaymailbox@8f02000!st,stih407-mailboxk  st231_gp_0#okay\bmailbox@8f03000!st,stih407-mailboxk0st231_audio_video#okay\ddma-controller@8e20000'!st,stih407-fdma-mpe31-11st,slim-rproc k0pcslimcoredmemperipheralsimem o    m\Vdma-controller@8e40000'!st,stih407-fdma-mpe31-12st,slim-rproc k0pcslimcoredmemperipheralsimem o    m #disableddma-controller@8e60000'!st,stih407-fdma-mpe31-13st,slim-rproc k0pcslimcoredmemperipheralsimem m  o   #disabledsti-uni-player@8d80000!st,stih407-uni-player-hdmiY-oUX U h kX mTVtx #disabledsti-uni-player@8d81000!st,stih407-uni-player-pcm-outY-oUX U h kX mUVtx #disabledsti-uni-player@8d82000!st,stih407-uni-player-dacY-oUX U h k X mVVtx #disabledsti-uni-player@8d85000!st,stih407-uni-player-spdifY-oUX U h kPX mYVtx #disabledsti-uni-reader@8d83000!st,stih407-uni-reader-pcm_inY-k0X mWVrx #disabledsti-uni-reader@8d84000!st,stih407-uni-reader-hdmiY-k@X mXVrx #disabledusb@9a03c00!st,st-ohci-300xk < moHDpowersoftresetWusbusb@9a03e00!st,st-ehci-300xk > m*default8XoHDpowersoftresetWusb#okayusb@9a83c00!st,st-ohci-300xk < moHDpowersoftresetYusb#okayusb@9a83e00!st,st-ehci-300xk > m*default8ZoHDpowersoftresetYusbthermal@91a0000!st,stih407-thermalk (Bthermalo mleds !gpio-ledsgreen offreserved-memorydrproc@45000000!shared-dma-poolkE@\`rproc@44000000!shared-dma-poolkD\ccpuscpu@0Bcpu!arm,cortex-a9k A *`O 5 oBcpu;I[Y-U\cpu@1Bcpu!arm,cortex-a9k A *`O 5 U\cpu@2Bcpu!arm,cortex-a9k AU\cpu@3Bcpu!arm,cortex-a9k AU\interrupt-controller@8761000!arm,cortex-a9-gickvv\scu@8760000!arm,cortex-a9-scukvtimer@8760200H!arm,cortex-a9-global-timerkv m o]cache-controller@8762000!arm,pl310-cachekv  i zarm-pmuH!arm,cortex-a9-pmu mpwm-regulator!pwm-regulator ^! CPU_1V0_AVS 8#okay\[restart-controller!st,stih407-restartYR#okaypowerdown-controller!st,stih407-powerdown \Hsoftreset-controller!st,stih407-softreset \Dpicophyreset-controller!st,stih407-picophyreset \_irq-syscfg!st,stih407-irq-syscfgY-&phy1!st,stih407-usb2-phy4 Y-D_ globalport\Kmiphy28lp!st,miphy28lp-phyY-dport@9b22000k @csata-uppcie-uppipewY4 miphy-sw-rstD?K\Gport@9b2a000k @csata-uppcie-uppipewY4 miphy-sw-rstD \Iport@8f95000kPcpipewusb3-upY 4 miphy-sw-rstD \Lst231-gp0!st,st231-rprocV`D sw_reseto9#FY-,dvq0_rxvq0_txvq1_rxvq1_tx0oababst231-delta!st,st231-rprocVcD sw_reseto9#FY-$dvq0_rxvq0_txvq1_rxvq1_tx0oadaddelta0 !st,st-delta%Bdeltadelta-st231delta-flash-promipophy2!st,stih407-usb2-phy4 Y-D_ globalport\Wphy3!st,stih407-usb2-phy4 Y-D_ globalport\Ychosenv/soc/serial@9530000memory@40000000Bmemoryk@opp_table!operating-points-v2\\opp00 opp01e opp02/ opp03G opp04Yh/  #address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyclock-output-namesphandlerangesregclocksclock-divclock-multgpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8gpio9gpio10gpio11gpio12gpio13gpio14gpio15gpio16gpio17gpio18gpio19gpio20gpio21gpio22gpio23gpio24gpio25ttyAS0ethernet0interrupt-parentst,syscfgreg-namesinterruptsinterrupt-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsst,bank-namest,retime-pin-maskhdmi_cecirtxtx_odrxsdasclkeyin0keyin1keyin2keyin3keyout0keyout1keyout2keyout3txd0txd1txd2txd3txentxclkrxd0rxd1rxd2rxd3rxdvrxclkclk125phyclkmdiomdcmdinttxercolcrsrx_erpwm-outpwm-captureinmtsrmrstctsrtssd_clksd_cmdsd_dat0sd_dat1sd_dat2sd_dat3sd_ledsd_pwrensd_cdsd_wpDATA7DATA6DATA5DATA4DATA3DATA2DATA1DATA0CLKINVALIDERRORPKCLKtrc_data0trc_data1trc_data2trc_data3trc_clkusb-oc-detectusb-pwr-enableusb-vbus-validmclklrclksclkdata4spdif_outemmc_clkemmc_cmdemmc_d0emmc_d1emmc_d2emmc_d3emmc_d4emmc_d5emmc_d6emmc_d7sd_vselspi-fsm-clkspi-fsm-csspi-fsm-mosispi-fsm-misospi-fsm-holspi-fsm-wpnand_cs1nand_cs0nand_d0nand_d1nand_d2nand_d3nand_d4nand_d5nand_d6nand_d7nand_wenand_dqsnand_alenand_clenand_rnbnand_oe#sound-dai-cellsstatuspinctrl-namespinctrl-0clock-namesbus-widthassigned-clocksassigned-clock-parentsassigned-clock-ratesresetstimeout-secst,lpc-modest,boot-device-regst,boot-device-spiphysphy-namesreset-namesports-implementeddr_modesnps,dis_u3_susphy_quirk#pwm-cellsst,pwm-num-chandevice_typest,sysconst,gmac_ensnps,pblphy-modest,tx-retime-srcsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-us#mbox-cellsmbox-namedma-channels#dma-cellsdmasdma-namesgpiosdefault-stateno-mapcpu-release-addroperating-pointsclock-latencycpu0-supplyoperating-points-v2arm,data-latencyarm,tag-latencycache-unifiedcache-levelpwmsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onmax-duty-cycle#reset-cellsst,irq-devicest,fiq-device#phy-cellsst,sata-genst,osc-rdymemory-regionmbox-namesmboxesstdout-pathopp-sharedopp-hzopp-microvolt